TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
Table 2-16
Terminal Functions — Signals and Control by Function (Part 11 of 12)
Signal Name
Ball No. Type IPD/IPU Description
SPI
SPISCS0
SPISCS1
SPICLK
AG1
AG2
AE1
AD2
AB1
OZ
OZ
OZ
I
UP
SPI Interface Enable 0
SPI Interface Enable 1
SPI Clock
UP
Down
Down
Down
SPIDIN
SPI Data In
SPIDOUT
OZ
SPI Data Out
Timer
TIMI0
TIMI1
TIMO0
TIMO1
L24
L26
L25
M26
I
Down
Down
Down
Down
Timer Inputs
I
OZ
OZ
Timer Outputs
TSIP
TSIP0 external clock A
TSIP0 external clock B
TSIP0 frame sync A
TSIP0 frame sync B
CLKA0
CLKB0
FSA0
FSB0
TR00
TR01
TR02
TR03
TR04
TR05
TR06
TR07
TX00
TX01
TX02
TX03
TX04
TX05
TX06
TX07
CLKA1
CLKB1
FSA1
FSB1
TR10
TR11
TR12
TR13
TR14
TR15
TR16
TR17
AF25
AG25
AJ26
AG26
AH26
AJ25
AD23
AD24
AC23
AH25
AC24
AE25
AE24
AD25
AJ24
AG24
AH24
AF24
AE23
AF23
AJ23
AH23
AG23
AJ22
AE22
AD21
AC21
AJ21
AH22
AJ20
AH21
AG21
I
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
I
I
I
I
I
I
I
TSIP0 receive data
I
I
I
I
OZ
OZ
OZ
OZ
TSIP0 transmit data
OZ
OZ
OZ
OZ
I
I
I
I
I
I
I
I
I
I
I
I
TSIP1 external clock A
TSIP1 external clock B
TSIP1 frame sync A
TSIP1 frame sync B
TSIP1 receive data
Copyright 2012 Texas Instruments Incorporated
Device Overview 51
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