ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉꢈ ꢀꢊ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉꢋ ꢀꢊ ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢇꢀ
ꢌ ꢍꢎ ꢏꢐꢑꢒꢓ ꢍ ꢔꢀ ꢐꢍ ꢕꢍ ꢀꢖꢗ ꢂꢍ ꢕ ꢔꢖꢗ ꢒꢘ ꢓ ꢆꢏ ꢂ ꢂꢓ ꢘ ꢂ
SPRS226H − NOVEMBER 2003 − REVISED AUGUST 2005
device compatibility
The C64x generation of devices has a diverse and powerful set of peripherals. The common peripheral set
and pin-compatibility that the C6414T, C6415T, and C6416T devices offer lead to easier system designs and
faster time to market. Table 2 identifies the peripherals and coprocessors that are available on the C6414T,
C6415T, and C6416T devices.
The C6414T, C6415T, and C6416T devices are pin-for-pin compatible, provided the following conditions are
met:
ꢀ
All devices are using the same peripherals.
The C6414T is pin-for-pin compatible with the C6415T/C6416T when the PCI and UTOPIA peripherals on
the C6415T/C6416T are disabled.
The C6415T is pin-for-pin compatible with the C6416T when they are in the same peripheral selection
mode. [For more information on peripheral selection, see the Device Configurations section of this data
sheet.]
ꢀ
The BEA[9:7] pins are properly pulled up/down.
[For more details on the device-specific BEA[9:7] pin configurations, see the Terminal Functions table of
this data sheet.]
†‡
Table 2. Peripherals and Coprocessors Available on the C6414T, C6415T, and C6416T Devices
PERIPHERALS/COPROCESSORS
EMIFA (64-bit bus width)
C6414T
C6415T
C6416T
√
√
√
√
√
√
√
√
√
√
√
√
√
√
EMIFB (16-bit bus width)
EDMA (64 independent channels)
HPI (32- or 16-bit user selectable)
PCI (32-bit) [Specification v2.2]
√
√
√
√
—
√
√
McBSPs (McBSP0, McBSP1, McBSP2)
UTOPIA (8-bit mode) [Specification v1.0]
Timers (32-bit) [TIMER0, TIMER1, TIMER2]
GPIOs (GP[15:0])
√
—
√
√
√
√
√
VCP/TCP Coprocessors
—
—
†
‡
— denotes peripheral/coprocessor is not available on this device.
Not all peripherals pins are available at the same time. (For more details, see the Device Configuration section.)
7
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