欢迎访问ic37.com |
会员登录 免费注册
发布采购

TMS320C6416TZLZ7 参数 Datasheet PDF下载

TMS320C6416TZLZ7图片预览
型号: TMS320C6416TZLZ7
PDF下载: 下载PDF文件 查看货源
内容描述: 定点数字信号处理器 [FIXED-POINT DIGITAL SIGNAL PROCESSORS]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器时钟
文件页数/大小: 140 页 / 2016 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号TMS320C6416TZLZ7的Datasheet PDF文件第2页浏览型号TMS320C6416TZLZ7的Datasheet PDF文件第3页浏览型号TMS320C6416TZLZ7的Datasheet PDF文件第4页浏览型号TMS320C6416TZLZ7的Datasheet PDF文件第5页浏览型号TMS320C6416TZLZ7的Datasheet PDF文件第7页浏览型号TMS320C6416TZLZ7的Datasheet PDF文件第8页浏览型号TMS320C6416TZLZ7的Datasheet PDF文件第9页浏览型号TMS320C6416TZLZ7的Datasheet PDF文件第10页  
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢈꢉ ꢈꢀꢊ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉ ꢋꢀꢊ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉ ꢇ ꢀ  
ꢌ ꢍ ꢎꢏ ꢐꢑꢒ ꢓꢍ ꢔ ꢀ ꢐꢍ ꢕ ꢍ ꢀꢖꢗ ꢂ ꢍ ꢕꢔ ꢖꢗ ꢒ ꢘꢓ ꢆꢏ ꢂꢂꢓ ꢘꢂ  
SPRS226H − NOVEMBER 2003 − REVISED AUGUST 2005  
device characteristics  
Table 1 provides an overview of the C6414T, C6415T, C6416T DSPs. The table shows significant features of  
the C64x devices, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package  
type with pin count.  
Table 1. Characteristics of the C6414T, C6415T, C6416T Processors  
HARDWARE FEATURES  
C6414T, C6415T, and C6416T  
EMIFA (64-bit bus width)  
(default clock source = AECLKIN)  
1
EMIFB (16-bit bus width)  
(default clock source = BECLKIN)  
1
Peripherals  
EDMA (64 independent channels)  
1
Not all peripherals pins  
are available at the same  
time. (For more details,  
see the Device  
HPI (32- or 16-bit user selectable)  
1 (HPI16 or HPI32)  
1 [C6415T/C6416T only]  
PCI (32-bit) [DeviceID Register Value 0xA16]  
McBSPs  
Configuration section.)  
(default internal clock source = CPU/4 clock  
frequency)  
3
Peripheral performance is  
dependent on chip-level  
configuration.  
UTOPIA (8-bit mode)  
1 [C6415T/C6416T only]  
3
32-Bit Timers  
(default internal clock source = CPU/8 clock  
frequency)  
General-Purpose Input/Output 0 (GP0)  
16  
VCP  
1 [C6416T only]  
1 [C6416T only]  
1056K  
Decoder Coprocessors  
On-Chip Memory  
TCP  
Size (Bytes)  
16K-Byte (16KB) L1 Program (L1P) Cache  
16KB L1 Data (L1D) Cache  
Organization  
1024KB Unified Mapped RAM/Cache (L2)  
CPU ID + CPU Rev ID  
Device_ID  
Control Status Register (CSR.[31:16])  
0x0C01  
Silicon Revision Identification Register  
(DEVICE_REV [20:16])  
Address: 0x01B0 0200  
DEVICE_REV[20:16] Silicon Revision  
10000 or 10001  
10010  
1.0 (14T/15T/16T)  
2.0 (14T/15T/16T)  
Frequency  
MHz  
ns  
600, 720, 850, 1000 (1-GHz)  
1.67 ns (C6414T/15T/16T - 6 [A-600, 600 MHz])  
1.39 ns (C6414T/15T/16T - 7 [A-720, 720 MHz])  
1.17 ns (C6414T/15T/16T - 8 [A-850, 850 MHz]  
1 ns (C6414T/15T/16T - 1 [1 GHz])  
Cycle Time  
Voltage  
1.1 V (600)  
1.2 V (-720, -850, -1 G)  
Core (V)  
I/O (V)  
3.3 V  
PLL Options  
CLKIN frequency multiplier  
Bypass (x1), x6, x12, x20  
532-Pin BGA (GLZ and ZLZ)  
0.09 µm  
BGA Package  
23 x 23 mm  
Process Technology  
µm  
Note: The extended temperature devices’ (A−600, A−720, and A−850) Electrical Characteristics and AC Timings are the same as those for  
commercial temperature devices (e.g., −600, −720, and −850).  
6
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
 
 复制成功!