ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉꢈ ꢀꢊ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉꢋ ꢀꢊ ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢇꢀ
ꢌ ꢍꢎ ꢏꢐꢑꢒꢓ ꢍ ꢔꢀ ꢐꢍ ꢕꢍ ꢀꢖꢗ ꢂꢍ ꢕ ꢔꢖꢗ ꢒꢘ ꢓ ꢆꢏ ꢂ ꢂꢓ ꢘ ꢂ
SPRS226H − NOVEMBER 2003 − REVISED AUGUST 2005
peripheral register descriptions (continued)
Table 10. Interrupt Selector Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
COMMENTS
Selects which interrupts drive CPU
interrupts 10−15 (INT10−INT15)
019C 0000
MUXH
Interrupt multiplexer high
Selects which interrupts drive CPU
interrupts 4−9 (INT04−INT09)
019C 0004
MUXL
Interrupt multiplexer low
Sets the polarity of the external
interrupts (EXT_INT4−EXT_INT7)
019C 0008
EXTPOL
−
External interrupt polarity
Reserved
019C 000C − 019C 01FF
Table 11. McBSP 0 Registers
REGISTER NAME
HEX ADDRESS RANGE
ACRONYM
COMMENTS
The CPU and EDMA controller
can only read this register;
they cannot write to it.
018C 0000
DRR0
McBSP0 data receive register via Configuration Bus
0x3000 0000 − 0x33FF FFFF
018C 0004
DRR0
DXR0
McBSP0 data receive register via Peripheral Bus
McBSP0 data transmit register via Configuration Bus
McBSP0 data transmit register via Peripheral Bus
McBSP0 serial port control register
0x3000 0000 − 0x33FF FFFF
018C 0008
DXR0
SPCR0
RCR0
018C 000C
McBSP0 receive control register
018C 0010
XCR0
McBSP0 transmit control register
018C 0014
SRGR0
MCR0
McBSP0 sample rate generator register
018C 0018
McBSP0 multichannel control register
018C 001C
RCERE00
XCERE00
PCR0
McBSP0 enhanced receive channel enable register 0
McBSP0 enhanced transmit channel enable register 0
McBSP0 pin control register
018C 0020
018C 0024
018C 0028
RCERE10
XCERE10
RCERE20
XCERE20
RCERE30
XCERE30
–
McBSP0 enhanced receive channel enable register 1
McBSP0 enhanced transmit channel enable register 1
McBSP0 enhanced receive channel enable register 2
McBSP0 enhanced transmit channel enable register 2
McBSP0 enhanced receive channel enable register 3
McBSP0 enhanced transmit channel enable register 3
Reserved
018C 002C
018C 0030
018C 0034
018C 0038
018C 003C
018C 0040 − 018F FFFF
21
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