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TLC5970RHPR 参数 Datasheet PDF下载

TLC5970RHPR图片预览
型号: TLC5970RHPR
PDF下载: 下载PDF文件 查看货源
内容描述: 3通道, 12位, PWM LED驱动器,降压型DC / DC转换器和差分信号接口 [3-Channel, 12-Bit, PWM LED Driver with Buck DC/DC Converter and Differential Signal Interface]
分类和应用: 显示驱动器转换器驱动程序和接口接口集成电路
文件页数/大小: 48 页 / 635 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TLC5970  
SBVS140 MARCH 2010  
www.ti.com  
GRAYSCALE (GS) FUNCTION (PWM CONTROL)  
The OUTn PWM control is controlled by a 12-bit grayscale counter that is clocked on each rising edge of either  
the internal oscillator or the shift clock signal generated by the differential signal, SCKA and SCKB. When bit 9 in  
the Function Control Data Latch is '0', the internal oscillator drives the PWM grayscale counter. When bit 9 is '1',  
SCKA and SCKB drive the grayscale counter. The OUTn that are programmed with a non-zero grayscale value  
(GSn) turn on at the first rising edge of the selected clock after the internal latch pulse generation. After the  
internal latch latch pulse goes high, the 12-bit grayscale counter counts the clock rising edges. Each OUTn stays  
on until the grayscale counter value is larger than the output GSn value. OUTn turns off on the rising edge of the  
clock.  
When the IC powers up, all data in the Grayscale Data Latch are set to '0'. Therefore, GSn data must be written  
into the Grayscale Data Latch to turn on OUTn. Equation 3 determines each OUTn on-time (tOUT_ON):  
tOUT_ON (ns) = tGSCLK (ns) ´ GSn  
Where:  
tGSCLK = Twice the period of the internal oscillator frequency if the internal clock is selected. One period of  
the shift clock frequency is generated by the differential signal if the external clock is selected.  
GSn = the programmed grayscale value for OUTn (GSn = 0d to 4095d)  
(3)  
AUTO DISPLAY REPEAT  
Auto display repeat, DSPRPT, allows OUTn to continuously turn on for multiple PWM cycles without the need to  
continuously reprogram the PWM grayscale registers. When Auto Repeat is enabled, bit 8 in the Function  
Control Data Latch is '1' and OUTn automatically turns on again at the next rising clock of the internal oscillator.  
When Auto Display Repeat is disabled by setting the control bit to '0', OUTn do not turn on again until an internal  
latch pulse is generated and another GS clock pulse goes high. This timing is shown in Figure 19 and Figure 20.  
Table 5. GS Data versus OUTn On-Duty and OUTn On-Time  
OUTn ON-TIME WHEN 5 MHz  
INTERNAL OSCILLATOR IS  
GS DATA  
(Binary)  
GS DATA  
(Decimal)  
GS DATA  
(Hex)  
OUTn ON-DUTY RATIO  
AGAINST MAXIMUM CODE (%)  
SELECTED FOR GS CLOCK  
(µs, Typical)  
0000 0000 0000  
0000 0000 0001  
0000 0000 0010  
0
000  
001  
002  
0
0
1
0.02  
0.05  
0.20  
0.40  
2
0111 1111 1111  
1000 0000 0000  
1000 0000 0001  
2047  
2048  
2049  
7FF  
800  
801  
49.99  
50.01  
50.04  
409.4  
409.6  
409.8  
1111 1111 1101  
1111 1111 1110  
1111 1111 1111  
4093  
4094  
4095  
FFD  
FFE  
FFF  
99.95  
99.98  
100.00  
818.6  
818.8  
819.0  
22  
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Copyright © 2010, Texas Instruments Incorporated  
Product Folder Link(s): TLC5970  
 
 
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