SLOS559 – JUNE 2008
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
SIMPLIFIED APPLICATION DIAGRAM
3.3 V
12 V
0 V–21 V
DVDD
GVDD
PVDD
OUT_A
LRCLK
Digital
Audio
Source
SCLK
MCLK_IN
SDIN1
SDIN2
OUT_B
OUT_C
BSB
BSA
Left
GAINx (2 pins)
FORMATx (3 pins)
Control
Inputs
MUTE
BSC
Right
BSD
OUT_D
RESET
PDN
TAS5132
12 V
0 V–21 V
PLL_FLTP
Loop
Filter
PLL_FLTM
SOUT+
SUB_PWM+
SUB_PWM–
BKND_ERR
VALID
SIN+
SIN–
FAULT
RESET
SOUT–
Subwoofer
B0264-08
2
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