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TAS5701PAPG4 参数 Datasheet PDF下载

TAS5701PAPG4图片预览
型号: TAS5701PAPG4
PDF下载: 下载PDF文件 查看货源
内容描述: 20 -W立体声数字音频功率放大器 [20-W STEREO DIGITAL AUDIO POWER AMPLIFIER]
分类和应用: 消费电路商用集成电路音频放大器视频放大器功率放大器
文件页数/大小: 26 页 / 628 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SLOS559 – JUNE 2008
TERMINAL FUNCTIONS (continued)
TERMINAL
NAME
RESET
NO.
16
I/O
(1)
DI
5-V
TOLERANT
5-V
TERMINATION
(2) (3)
DESCRIPTION
Reset, active-low. A system reset is generated by applying a logic
low to this terminal. RESET is an asynchronous control signal that
sets the VALID outputs low, and places the PWM in the hard mute
state (stop switching). Gain is immediately set to full attenuation.
Upon the release of RESET, if PDN is high, the system performs a
4-ms to 5-ms device initialization and sets the gain and format to the
settings determined by the hardware pins.
Serial audio data clock (shift clock). SCLK is the serial audio port
input data bit clock.
Serial audio data 1 input is one of the serial data input ports. SDIN1
supports three discrete (stereo) data formats.
Serial audio data 2 input is one of the serial data input ports. SDIN2
supports three discrete (stereo) data formats.
Subwoofer negative PWM output. BD modulated signal.
Subwoofer positive PWM output. BD modulated signal.
Test pin. Connect directly to GND.
Output indicating validity of ALL PWM channels, active-high. This pin
is connected to an external power stage. If no external power stage is
used, leave this pin floating.
Power supply for VREG (10.8 V to 13.2 V)
Internally regulated 1.8-V analog supply voltage. This terminal must
not be used to power external devices.
Internally regulated 1.8-V analog supply voltage. This terminal must
not be used to power external devices.
Digital regulator output. Not to be used for powering external circuitry.
Pullup
SCLK
SDIN1
SDIN2
SUB_PWM–
SUB_PWM+
TEST1
VALID
23
25
24
39
40
7
38
DI
DI
DI
DO
DO
DI
DO
5-V
5-V
5-V
VDD
VR_ANA
VR_DIG
VREG
VREG_EN
6
14
27
43
18
P
P
P
P
DI
Pulldown
Voltage regulator enable. Connect directly to GND.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
GVDD, VDD
PVDD
Supply voltage
DVDD
AVDD
OUT_X to GND_X
BST_X to GND_X
Input voltage
3.3-V digital input
5-V tolerant
(2)
(1)
VALUE
–0.3 to 13.2
–0.3 to 23
–0.3 to 3.6
–0.3 to 3.6
–0.3 to 30
–0.3 to 43.2
–0.5 to DVDD + 0.5
–0.5 to DVDD + 2.5
±20
±20
0 to 85
0 to 150
–40 to 125
UNIT
V
digital input
V
mA
mA
°C
°C
°C
Input clamp current, I
IK
(V
I
< 0 or V
I
> 1.8 V)
Output clamp current, I
OK
(V
O
< 0 or V
O
> 1.8 V)
Operating free-air temperature
Operating junction temperature range
Storage temperature range, T
stg
(1)
(2)
Stresses beyond those listed under
absolute ratings
may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under
recommended operation conditions
are
not implied. Exposure to absolute-maximum conditions for extended periods may affect device reliability.
5-V tolerant inputs are PDN, RESET, MUTE, SCLK, LRCLK, MCLK, SDIN1, SDIN2.
Copyright © 2008, Texas Instruments Incorporated
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