SLOS563 – MARCH 2008
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
SIMPLIFIED APPLICATION DIAGRAMS
Bridge-Tied Load (BTL) Mode
3.3 V
10 V–26 V
DVDD/AVDD
AVCC/PVCC
OUT_A
LRCLK
Digital
Audio
Source
(TAS3x08)
SCLK
MCLK
SDIN1
SDIN2
OUT_B
OUT_C
BST_B
BST_A
LC
BTL
*
Left
BST_C
LC
BTL
*
GAIN_x (2 pins)
MUTE
Control
Inputs
FORMATx (3 pins)
RESET
PDN
CONFIG_x (2 pins)
SUB_PWM+
PWM_AP
Right
BST_D
OUT_D
TAS5601
10 V–26 V
OUT_A
PWM_AN
SUB_PWM–
PLL_FLTP
Loop
Filter
PLL_FLTM
PWM_BP
PWM_BN
BST_A
LC
BTL
*
BST_B
Subwoofer
BKND_ERR
VALID
FAULT
RESET
OUT_B
* Refer to TI Application Note (SLOA119) on LC filter design for BTL (AD/BD mode) configuration.
B0264-02
2
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