Pin Assignments
133
139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
13-INPUT POSITIVE-NAND GATES
positive logic:
Y = A•B•C•D•E•F•G•H•I•J•K•L•M
V
CC
M
L
K
J
I
H
Y
16 15 14 13 12 11 10
9
SELECT
2A 2B
DATA OUTPUTS
2Y1 2Y2
ENABLE
2G
V
CC
2Y0
2Y3
16 15 14 13 12 11 10
9
G
A
B
Y0
Y1
Y2
Y3
1
A
2
B
3
C
4
D
5
E
6
F
7
G
8
GND
G
A
B
Y0
Y1
Y2
Y3
See page 287
1
1G
2
1A
3
1B
4
1Y0
5
1Y1
6
1Y2
7
1Y3
8
GND
136
ENABLE
SELECT
DATA OUTPUTS
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
WITH OPEN COLLECTOR OUTPUTS
positive logic:
See page 292
Y = A•B = AB + AB
V
CC
4B
4A
4Y
3B
3A
3Y
14 13 12 11 10
9
8
140
DUAL 4-INPUT POSITIVE-NAND
50-Ω LINE DRIVERS
positive logic:
Y = ABCD
V
2D
2C
NC
2B
2A
2Y
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
7
GND
CC
14 13 12 11 10
9
8
See page 287
137
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
WITH ADDRESS LATCHES
DATA OUTPUTS
Y2 Y3 Y4
V
Y0
Y1
Y5
Y6
CC
1
1A
2
1B
3
NC
4
1C
5
1D
6
1Y
7
GND
16 15 14 13 12 11 10
9
Y0
B
Y1
C
Y2
GL
Y3
G2
Y4
G1
Y5
Y6
NC-No internal connection
A
Y7
See page 294
1
A
2
3
C
4
GL
5
6
G1
7
8
GND
145
B
G2
Y7
BCD-TO-DECIMAL DECODERS/DRIVERS
SELECT
ENABLE
OUTPUT
See page 288
PARALLEL INPUTS
OUTPUTS
8
138
V
A
B
C
D
9
7
CC
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXRS
16 15 14 13 12 11 10
9
DATA OUTPUTS
V
Y0
Y1
Y2 Y3 Y4
Y5
Y6
A
B
C
D
9
CC
16 15 14 13 12 11 10
9
BCD-TO-DECIMAL
0
1
2
3
4
5
6
7
8
Y0
B
Y1
C
Y2
Y3
Y4
G1
Y5
Y6
A
1
0
2
1
3
2
4
3
5
4
6
5
7
6
8
GND
G2A
G2B
Y7
OUTPUTS
1
A
2
B
3
C
4
G2A
5
G2B
6
G1
7
Y7
8
GND
SELECT
ENABLE
OUTPUT
See page 290
See page 295
168