Pin Assignments
86
97
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
positive logic:
SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS
RATE INPUT
Y = A ≈ B or Y = AB + AB
ENA-
BLE
UNITY/
V
CC
D
C
CLEAR CASCADE INPUT STROBE CLOCK
V
CC
4B
4A
4Y
3B
3A
3Y
16 15 14 13 12 11 10
9
14 13 12 11 10
9
8
D
E
C
F
CLEAR UNITY/ ENA- STROBE
CASCADE BLE
INPUT
B
CK
ENABLE
OUTPUT
A
Z
Y
1
B
2
E
3
F
4
A
5
Z
6
Y
7
ENABLE
OUTPUT
8
GND
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
7
GND
RATE INPUTS
OUTPUTS
See page 268
See page 272
90
107
DECADE COUNTER
DUAL J-K FLIP-FLOPS WITH CLEAR
INPUT
A
NC
Q
Q
GND
Q
Q
C
A
D
B
B
14 13 12 11 10
9
8
V
1CLR 1CK
2K
2CLR 2CK
2J
CC
14 13 12 11 10
9
8
Q
Q
Q
A
D
A
Q
C
J
K
K
CLR
Q
J
BD
Q
Q
9 (2)
9 (1)
CK
CK
R
R
0 (1) 0 (2)
CLR
Q
Q
Q
1
2
3
4
NC
5
CC
6
7
BD
R
R
V
Q
Q
0 (1) 0 (2)
9 (1) 9 (2)
INPUT
1
1J
2
1Q
3
1Q
4
1K
5
2Q
6
2Q
7
GND
NC-No internal connection
See page 269
See page 274
92
109
DIVIDE-BY-TWELVE DECODE COUNTERS
DUAL J-K POSITIVE-EDGE-TRIGGERED
FLIP-FLOPS WITH CLEAR AND PRESET
INPUT
A
NC
Q
Q
GND
Q
Q
D
A
B
C
C
14 13 12 11 10
9
8
V
CC
2CLR
2J
2K
2CK
2PR
2Q
2Q
16 15 14 13 12 11 10
9
PR
Q
J
Q
Q
Q
A
D
A
B
Q
D
CK
CLR
K
J
Q
Q
Q
K
R
R
0 (2)
0 (1)
CLR
CK
PR
1
2
3
NC
4
NC
5
CC
6
7
INPUT NC
B
V
R
R
0 (1) 0 (2)
1
1CLR
2
1J
3
1K
4
1CK
5
1PR
6
1Q
7
1Q
8
GND
NC-No internal connection
See page 270
See page 276
93
112
4-BIT BINARY COUNTERS
DUAL J-K NEGATIVE-EDGE-TRIGGERED
FLIP-FLOPS WITH CLEAR AND PRESET
INPUT
A
NC
Q
Q
GND
Q
Q
C
A
D
B
B
14 13 12 11 10
9
8
V
CC
2CK
2K
2J
2PR
2Q
1CLR
2CLR
16 15 14 13 12 11 10
9
Q
Q
Q
A
D
A
B
Q
C
CLR
PR
CK
K
J
Q
Q
J
Q
Q
R
R
0 (1) 0 (2)
CK
PR
K
CLR
1
INPUT
B
2
3
4
NC
5
CC
6
NC
7
NC
R
R
V
0 (1) 0 (2)
1
1CK
2
1K
3
1J
4
1PR
5
1Q
6
1Q
7
2Q
8
GND
NC-No internal connection
See page 271
See page 278
166