2G79
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
Logic Diagram
C
CLK
C
C
TG
Q
C
C
C
C
D
TG
TG
TG
C
C
C
FUNCTION TABLE
INPUTS
OUTPUT
Q
CLK
D
H
L
H
L
↑
↑
L
X
Q
0
ELECTRICAL CHARACTERISTICS AND RECOMMENDED OPERATING CONDITIONS
LVC
5V
LVC
3.3V
LVC
2.5V
LVC
1.8V
AUC
2.5V
AUC
1.8V
PARAMETER
MAX or MIN
UNIT
ICC
IOH
IOL
MAX
MAX
MAX
0.005 0.005 0.005 0.005 0.01
0.01
-8
8
mA
mA
mA
-32
32
-24
24
-8
8
-4
4
-9
9
TIMING REQUREMENTS AND SWITCHING CHARACTERISTICS
LVC
5V
LVC
3.3V
LVC
2.5V
LVC
1.8V
AUC
2.5V
AUC
1.8V
PARAMETER
INPUT
OUTPUT
MAX or MIN
MIN
MIN
160
2.5
0.9
0.9
0.5
4.5
4.5
160
2.5
1.1
1.1
0.7
5.2
5.2
160
2.5
1.4
1.4
0.8
7.0
7.0
160
2.5
2.2
2.2
1.4
9.9
9.9
275
1
250
1
fmax
tw
CLK high or low
Before CLK ↑, Data high
Before CLK ↑, Data low
Data after CLK ↑
0.5
0.5
0.1
1.8
1.8
0.6
0.6
0.1
2.4
2.4
tsu
MIN
th
tPLH
tPHL
MIN
CLK
Q
MAX
UNIT fmax : MHz other : ns
128
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