RM48L950
RM48L750
RM48L550
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SPNS174–SEPTEMBER 2011
2.4.1.14 Test and Debug Modules Interface
Table 2-19. PGE Test and Debug Modules Interface
Terminal
Signal
Type
Default
Pull State
Pull Type
Description
Signal Name
144
PGE
TEST
nTRST
RTCK
TCK
34
I/O
Input
Output
Input
I/O
Pull Down Fixed, 100uA
Test enable
109
113
112
110
111
108
JTAG test hardware reset
JTAG return test clock
JTAG test clock
-
-
Pull Down Fixed, 100uA
Pull Up
TDI
JTAG test data in
JTAG test data out
JTAG test select
TDO
I/O
Pull Down
TMS
I/O
Pull Up
2.4.1.15 Flash Supply and Test Pads
Table 2-20. PGE Flash Supply and Test Pads
Terminal
Signal
Type
Default
Pull State
Pull Type
Description
Signal Name
144
PGE
VCCP
FLTP1
FLTP2
134
7
Input
-
-
Flash pump supply
Flash test pads. These
terminals are reserved for
TI use only. For proper
operation these terminals
must connect only to a
test pad or not be
8
connected at all [no
connect (NC)].
2.4.1.16 Supply for Core Logic: 1.2V nominal
Table 2-21. PGE Supply for Core Logic: 1.2V nominal
Terminal
Signal
Type
Default
Pull State
Pull Type
Description
Signal Name
144
PGE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
17
29
-
-
-
Core supply
45
48
49
57
87
101
114
123
137
143
Copyright © 2011, Texas Instruments Incorporated
Device Package and Terminal Functions
21
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