RM48L950
RM48L750
RM48L550
SPNS174–SEPTEMBER 2011
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2.4.1.12 System Module Interface
Table 2-17. PGE System Module Interface
Terminal
Signal
Type
Default
Pull State
Pull Type
Description
Signal Name
144
PGE
nPORRST
46
Input
Pull Down 100uA
Power-on reset, cold reset
External power supply
monitor circuitry must
drive nPORRST low when
any of the supplies to the
microcontroller fall out of
thespecified range. This
terminal has a glitch filter.
See Section 4.8.
nRST
116
I/O
Pull Up
100uA
System reset, warm reset,
bidirectional.
The internal circuitry
indicates any reset
condition by driving nRST
low.
The external circuitry can
assert a system reset by
driving nRST low. To
ensure that an external
reset is not arbitrarily
generated, TI
recommends that an
external pull-up resistor is
connected to this terminal.
This terminal has a glitch
filter. See Section 4.8.
nERROR
117
I/O
Pull Down 20uA
ESM Error Signal
Indicates error of high
severity. See
Section 4.18.
2.4.1.13 Clock Inputs and Outputs
Table 2-18. PGE Clock Inputs and Outputs
Terminal
Signal
Type
Default
Pull State
Pull Type
Description
Signal Name
144
PGE
OSCIN
18
Input
-
-
From external
crystal/resonator, or
external clock input
KELVIN_GND
OSCOUT
19
20
Input
Kelvin ground for oscillator
Output
To external
crystal/resonator
ECLK
119
14
I/O
Pull Down Programmable, External prescaled clock
20uA
output, or GIO.
GIOA[5]/EXTCLKIN
Input Pull Down 20uA
External clock input #1
20
Device Package and Terminal Functions
Copyright © 2011, Texas Instruments Incorporated
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