RM46L450
RM46L850
www.ti.com
SPNS184 –SEPTEMBER 2012
Table 4-36. ESM Channel Assignments (continued)
ERROR Condition
MibSPI3 - RAM parity error
MibADC1 - RAM parity error
Reserved
Group
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Channels
18
19
20
DCAN1 - RAM parity error
DCAN3 - RAM parity error
DCAN2 - RAM parity error
MibSPI5 - RAM parity error
Reserved
21
22
23
24
25
RAM even bank (B0TCM) - correctable ECC error
CPU - self-test failed
26
27
RAM odd bank (B1TCM) - correctable ECC error
Reserved
28
29
DCC1 - error
30
CCM-R4 - self-test failed
Reserved
31
32
Reserved
33
N2HET2 - RAM parity error
FMC - correctable ECC error (Bank 7 access)
FMC - uncorrectable ECC error (Bank 7 access)
34
35
36
IOMM - Access to unimplemented location in IOMM frame, or write access
detected in unprivileged mode
37
Power domain controller compare error
Power domain controller self-test error
Group1
Group1
Group1
38
39
40
eFuse farm error – this error signal is generated when any bit in the eFuse farm
error status register is set. The application can choose to generate an interrupt
whenever this bit is set to service any eFuse farm error conditions.
eFuse farm - self test error. This error signal is generated only when a self test on
the eFuse controller generates an error condition. When this error signal is set,
group 1 channel 40 error signal will also be set.
Group1
41
PLL#2 - Slip
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
Group1
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
Ethernet Controller bus master access error
USB Host Controller master interface
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Copyright © 2012, Texas Instruments Incorporated
System Information and Electrical Specifications
105
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