ADS1259
www.ti.com
SBAS424C –JUNE 2009–REVISED MARCH 2010
PIN CONFIGURATION
PW PACKAGE
TSSOP-20
(TOP VIEW)
AINP
AINN
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
AVDD
AVSS
RESET/PWDN
START
VREFN
VREFP
REFOUT
DVDD
SYNCOUT
CS
ADS1259
SCLK
DGND
BYPASS
XTAL2
DIN
DOUT
DRDY 10
XTAL1/CLKIN
ADS1259 Terminal Functions
PIN NAME
PIN #
FUNCTION
DESCRIPTION
AINP
AINN
1
2
Analog input
Analog input
Digital input
Digital input
Digital output
Digital input
Digital input
Digital input
Digital output
Digital output
Positive analog input
Negative analog input
RESET/PWDN
START
SYNCOUT
CS
3
Reset/Power-Down; reset is active low; hold low for power-down
Start conversions, active high
Sync clock output (fCLK/8)
SPI chip-select, active low
SPI clock input
4
5
6
SCLK
7
DIN
8
SPI data input
DOUT
9
SPI data output
DRDY
10
Data ready output, active low
Internal oscillator: DGND
XTAL1/CLKIN
11
Digital input
External clock: clock input
Crystal oscillator: external crystal1
XTAL2
BYPASS
DGND
12
13
14
15
16
17
18
19
20
Digital
Analog
External crystal2, otherwise no connection
Core voltage bypass
Digital
Digital ground
DVDD
Digital
Digital power supply
REFOUT
VREFP
VREFN
AVSS
Analog output
Analog input
Analog input
Analog
Positive reference output
Positive reference input
Negative reference input
Negative analog power supply and negative reference output
Positive analog power supply
AVDD
Analog
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