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PGA204BU-TR 参数 Datasheet PDF下载

PGA204BU-TR图片预览
型号: PGA204BU-TR
PDF下载: 下载PDF文件 查看货源
内容描述: [INSTRUMENTATION AMPLIFIER, 150uV OFFSET-MAX, 1MHz BAND WIDTH, PDSO16]
分类和应用: 转换器
文件页数/大小: 45 页 / 573 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADS1259  
www.ti.com  
SBAS424C JUNE 2009REVISED MARCH 2010  
ANALOG INPUTS (AINP, AINN)  
ESD diodes protect the analog inputs. To keep these  
diodes from turning on, make sure the voltages on  
the input pins do not go below AVSS by more than  
300mV, and likewise do not exceed AVDD by more  
than 300mV.  
The ADS1259 measures the differential input signal  
VIN = (AINP – AINN) against the differential reference  
VREF = (VREFP – VREFN) using internal capacitors  
that are continuously charged and discharged.  
Figure 36 shows the simplified schematic of the ADC  
input circuitry; the right side of the figure illustrates  
the input circuitry with the capacitors and switches  
replaced by an equivalent circuit. Figure 35  
demonstrates the ON/OFF timings for the switches of  
Figure 36.  
AVSS – 300mV < (AINP or AINN) < AVDD + 300mV.  
Note that the valid input range is:  
AVSS – 100mV < (AINP or AINN) < AVDD + 100mV  
tSAMPLE = 1/fMOD  
ON  
S1  
In Figure 36, S1 switches close during the input  
sampling phase. With switch S1 closed, CA1 charges  
to AINP, CA2 charges to AINN, and CB charges to  
(AINP – AINN). For the discharge phase, S1 opens  
first and then S2 closes. CA1 and CA2 discharge to  
approximately to AVSS + 2.5V and CB discharges to  
0V. This two-phase sample/discharge cycle repeats  
with a period of tSAMPLE = 1/fMOD. fMOD is the operating  
frequency of the modulator, where fMOD = fCLK/8.  
OFF  
ON  
S2  
OFF  
Figure 35. S1 and S2 Switch Timing for Figure 36  
Although optimized for differential signals, the  
ADS1259 inputs may be driven with a single-ended  
signal by fixing one input to AVSS or mid-supply. Full  
dynamic range is achieved when the inputs are  
The charging of the input sampling capacitors draws  
a transient current from the source driving the  
ADS1259 ADC inputs. The average value of this  
current can be used to calculate an effective  
impedance (REFF) where REFF = VIN/IAVERAGE. These  
impedances scale inversely with fMOD. For example, if  
fMOD is reduced by a factor of two, the impedances  
double. Note that the sampling capacitors can vary  
±15% over production lots and typically vary 1% with  
temperature. The variations of the sampling  
capacitors have a corresponding effect on the analog  
input impedance.  
differentially driven ±VREF  
.
As a result of the switched-capacitor input structure of  
the ADS1259, a buffer is recommended to drive the  
analog inputs. An input filter comprised of 20to 50Ω  
resistors and 10nF capacitors should be used  
between the buffer and the ADS1259 inputs.  
(fMOD = 0.9216MHz)  
AVSS + 2.5V  
AVDD  
AVSS + 2.5V  
S2  
REFF A = 500kW  
CA1 = 2pF  
CB = 8pF  
ESD Diodes  
Equivalent  
AINP  
AINP  
AINN  
Circuit  
S1  
S1  
REFF B = 130kW  
AINN  
REFF A = 500kW  
CA2 = 2pF  
ESD Diodes  
S2  
AVSS + 2.5V  
1
REFF  
=
f
MOD ´ CX  
AVSS  
AVSS + 2.5V  
RDIFF = REFF B || 2REFF A = 120kW  
RCOM = REFF A = 500kW  
and fMOD = fCLK/8  
Figure 36. Simplified ADC Input Structure  
Copyright © 2009–2010, Texas Instruments Incorporated  
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Product Folder Link(s): ADS1259  
 
 
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