Table 3−8. EEPROM Loading Map (Continued)
SERIAL ROM
OFFSET
BYTE DESCRIPTION
3Bh
3Ch
3Dh
3Eh
3Fh
40h
41h
42h
43h
44h
45h
46h
47h
48h
49h
4Ah
4Bh
4Ch
4Dh
4Eh
4Fh
50h
51h
52h
53h
54h
55h
56h
57h
58h
59h
5Ah
5Bh
5Ch
5Dh
5Eh
5Fh
Flash media core function indicator (03h)
Number of bytes (05h)
PCI 2Ch, subsystem vendor ID, byte 0
PCI 2Dh, subsystem vendor ID, byte 1
PCI 2Eh, subsystem ID, byte 0
PCI 2Fh, subsystem ID, byte 1
PCI 4Ch, general control, bits 6−4, 2−0
SD host controller function indicator (03h)
Number of bytes (0Bh)
PCI 2Ch, subsystem vendor ID, byte 0
PCI 2Dh, subsystem vendor ID, byte 1
PCI 2Eh, subsystem ID, byte 0
PCI 2Fh, subsystem ID, byte 1
PCI 88h, general control bits 6−4, 0
PCI 94h, slot 0 3.3 V maximum current
PCI 98h, slot 1 3.3 V maximum current
PCI 9Ch, slot 2 3.3 V maximum current
Reserved (PCI A0h, slot 3 3.3 V maximum current)
Reserved (PCI A4h, slot 4 3.3 V maximum current)
Reserved (PCI A8h, slot 5 3.3 V maximum current)
PCI Smart Card function indicator (05h)
Number of bytes (0Eh)
PCI 09h, class code, byte 0
PCI 0Ah, class code, byte 1
PCI 0Bh, class code, byte 2
PCI 2Ch, subsystem vendor ID, byte 0
PCI 2Dh, subsystem vendor ID, byte 1
PCI 2Eh, subsystem ID, byte 0
PCI 2Fh, subsystem ID, byte 1
PCI 4Ch, general control bits 6−4
PCI 58h, Smart Card configuration 1, byte 0, bits 6−4, 2−0
PCI 59h, Smart Card configuration 1, byte 1, bits 6−4, 2−0
PCI 5Ah, Smart Card configuration 1, byte 2, bits 6−4, 2−0
PCI 5Bh, Smart Card configuration 1, byte 3, bits 7−4, 2−0
PCI 5Ch, Smart Card configuration 2, byte 0
PCI 5Dh, Smart Card configuration 2, byte 1
End-of-list indicator (80h)
3−14
TI [ TEXAS INSTRUMENTS ]
