Table 2−11. 16-Bit PC Card Interface Control Terminals (Continued)
†
SKT A TERMINAL
SKT B TERMINAL
I/O
TYPE
POWER
RAIL
DESCRIPTION
NAME
NO.
NAME
NO.
Output enable. OE is driven low by the controller to enable 16-bit memory PC Card
data output during host memory read cycles.
DMA terminal count. OE is used as terminal count (TC) during DMA operations to a
16-bit PC Card that supports DMA. The controller asserts OE to indicate TC for a DMA
write operation.
V
V
/
CCA
CCB
A_OE
C12
C04
B_OE
L18
O
Ready. The ready function is provided when the 16-bit PC Card and the host socket are
configured for the memory-only interface. READY is driven low by 16-bit memory PC
Cards to indicate that the memory card circuits are busy processing a previous write
command. READY is driven high when the 16-bit memory PC Card is ready to accept a
new data transfer command.
V
V
/
A_READY
(IREQ)
B_READY
(IREQ)
CCA
CCB
B19
I
Interrupt request. IREQ is asserted by a 16-bit I/O PC Card to indicate to the host that a
controller on the 16-bit I/O PC Card requires service by the host software. IREQ is high
(deasserted) when no interrupt is requested.
Attribute memory select. REG remains high for all common memory accesses. When
REG is asserted, access is limited to attribute memory (OE or WE active) and to the I/O
space (IORD or IOWR active). Attribute memory is a separately accessed section of
card memory and is generally used to record card capacity and other configuration and
attribute information.
DMA acknowledge. REG is used as a DMA acknowledge (DACK) during DMA
operations to a 16-bit PC Card that supports DMA. The controller asserts REG to
indicate a DMA operation. REG is used in conjunction with the DMA read (IOWR) or
DMA write (IORD) strobes to transfer data.
V
V
/
CCA
CCB
C05
A06
F15
F17
O
A_REG
B_REG
V
V
/
/
/
CCA
CCB
A_RESET
B_RESET
PC Card reset. RESET forces a hard reset to a 16-bit PC Card.
O
I/O
I
A_VS1
A_VS2
A03
E08
B_VS1
B_VS2
C18
F19
Voltage sense 1 and voltage sense 2. VS1 and VS2, when used in conjunction with
each other, determine the operating voltage of the PC Card.
V
V
CCA
CCB
Bus cycle wait. WAIT is driven by a 16-bit PC Card to extend the completion of the
memory or I/O cycle in progress.
V
V
CCA
CCB
B03
B18
A_WAIT
B_WAIT
Write enable. WE is used to strobe memory write data into 16-bit memory PC Cards.
WE is also used for memory PC Cards that employ programmable memory
technologies.
DMA terminal count. WE is used as a TC during DMA operations to a 16-bit PC Card
that supports DMA. The controller asserts WE to indicate the TC for a DMA read
operation.
V
V
/
CCA
CCB
A_WE
B09
B_WE
J15
O
Write protect. WP applies to 16-bit memory PC Cards. WP reflects the status of the
write-protect switch on 16-bit memory PC Cards. For 16-bit I/O cards, WP is used for
the 16-bit port (IOIS16) function.
I/O is 16 bits. IOIS16 applies to 16-bit I/O PC Cards. IOIS16 is asserted by the 16-bit
PC Card when the address on the bus corresponds to an address to which the 16-bit
PC Card responds, and the I/O port that is addressed is capable of 16-bit accesses.
A_WP
(IOIS16)
B_WP
(IOIS16)
V
V
/
CCA
CCB
C03
A18
I
DMA request. WP can be used as the DMA request signal during DMA operations to a
16-bit PC Card that supports DMA. If used, then the PC Card asserts WP to indicate a
request for a DMA operation.
†
These terminals are reserved for the PCI6611 and PCI6411 controllers.
2−21
TI [ TEXAS INSTRUMENTS ]
