Voltage Reference
5
Voltage Reference
The ADS1248 device has the option of selecting between three different references: REF0, REF1, and the
internal reference, through registers in the ADS1248 chip. The EVM provides a 2.048V reference for
REF1 from U1, filtered and buffered through U2. This 2.048V may be used to drive the REF1P input.
REF1P should not be connected to AVDD through switch S1 because this connection will violate the
specification for the maximum reference input.
shows switch S1 as it appears on the EVM. The
low side of the reference (REF1N) is tied to AVSS.The different reference options under different supply
conditions are outlined in
Figure 1. Reference Select Switch S1
Table 5. REF1 Reference Voltage Options
S1 Position
AVDD
5V
5V
2.5V
2.5V
(1)
AVSS
0V
0V
–2.5V
–2.5V
J1 Setting
1-2
2-3
1-2
2-3
(1)
REF1P
2.048V
0V
–0.452V
0V
REF1N
0V
0V
–2.5V
–2.5V
REF1
Reference
Voltage
2.048V
Invalid
selection
2.048V
2.5V
BUFF
BUFF
BUFF
BUFF
Switch S1 should not be set to AVDD.
The REF0N and REF0P pins are connected directly to the external reference pins on J8.18 and J8.20,
respectively. These pins are diode-clamped to AVDD and AVSS, and protected with D3, a 5.1V zener. If
the external reference pins are not supplied with a external source, REF0N will be at approximately AVSS
+ 0.6V, and REF0P will be at approximately AVDD–0.6V.
The internal reference voltage can be measured between testpoints TP3 (Int REF) and TP5 (REFCOM).
6
Clock Source
The ADS1248 has an internal clock or can be provided an external clock. The EVM uses the internal clock
mode only. Provision is made on the EVM circuit board, however, for an external clock source. A footprint
is provided at U8 for a crystal oscillator to be mounted on the board. An external clock may also be
provided by a processor on the TOUT pin (J7.17), or an external clock source connected to J14.1 (ground)
and J14.2 (signal).
J2 controls how the clock source is selected. With pins J2.1 and J2.2 shorted, GPIO5 from J7.19 can
control whether the A or B side of U7 is selected. If the A side is selected, the clock should come from an
external source provided as described above. If the B side is selected, the clock should come from the
crystal oscillator. If a selection is made and no clock is provided on that input, the ADS1248 detects that
no external clock is present and enables its internal oscillator.
6.1
Usage in PDK
If using the ADS1248EVM as part of the ADS1248EVM-PDK, J14 should have a jumper installed.
Remove any shorting blocks on jumper J13, and make sure J2 has a jumper between pins 1 and 2 (the IO
position). This configuration grounds the CLK input to the ADS1248 and ensures that the internal oscillator
starts up.
6
ADS1148EVM, ADS1248EVM, ADS1148EVM-PDK, and ADS1248EVM-PDK
Copyright
©
2009–2011, Texas Instruments Incorporated
SBAU142B
–
April 2009
–
Revised May 2011
TI [ TEXAS INSTRUMENTS ]
