ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢄ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢃ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄꢅ ꢆꢇꢃ ꢆꢇ
ꢀ ꢉꢊꢋ ꢌ ꢁꢉ ꢍ ꢎꢏꢐ ꢀ ꢉꢑꢒꢓ ꢑꢓ ꢎꢔ ꢒꢓ ꢐꢐ ꢋꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
Terminal Functions
MSP430x14x1
TERMINAL
NAME
I/O
DESCRIPTION
NO.
64
62
1
AV
AV
Analog supply voltage, positive terminal.
Analog supply voltage, negative terminal.
CC
SS
DV
DV
Digital supply voltage, positive terminal. Supplies all digital parts.
CC
SS
63
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
Digital supply voltage, negative terminal. Supplies all digital parts.
P1.0/TACLK
P1.1/TA0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
General-purpose digital I/O pin/Timer_A, clock signal TACLK input
General-purpose digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0 output/BSL transmit
General-purpose digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1 output
General-purpose digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2 output
General-purpose digital I/O pin/SMCLK signal output
P1.2/TA1
P1.3/TA2
P1.4/SMCLK
P1.5/TA0
General-purpose digital I/O pin/Timer_A, compare: Out0 output
P1.6/TA1
General-purpose digital I/O pin/Timer_A, compare: Out1 output
P1.7/TA2
General-purpose digital I/O pin/Timer_A, compare: Out2 output
P2.0/ACLK
P2.1/TAINCLK
P2.2/CAOUT/TA0
P2.3/CA0/TA1
P2.4/CA1/TA2
General-purpose digital I/O pin/ACLK output
General-purpose digital I/O pin/Timer_A, clock signal at INCLK
General-purpose digital I/O pin/Timer_A, capture: CCI0B input/Comparator_A output/BSL receive
General-purpose digital I/O pin/Timer_A, compare: Out1 output/Comparator_A input
General-purpose digital I/O pin/Timer_A, compare: Out2 output/Comparator_A input
General-purpose digital I/O pin/input for external resistor defining the DCO nominal frequency
General-purpose digital I/O pin
P2.5/R
OSC
P2.6
P2.7/TA0
General-purpose digital I/O pin/Timer_A, compare: Out0 output
P3.0/STE0
P3.1/SIMO0
P3.2/SOMI0
P3.3/UCLK0
P3.4/UTXD0
P3.5/URXD0
P3.6/UTXD1
P3.7/URXD1
P4.0/TB0
General-purpose digital I/O pin/slave transmit enable – USART0/SPI mode
General-purpose digital I/O pin/slave in/master out of USART0/SPI mode
General-purpose digital I/O pin/slave out/master in of USART0/SPI mode
General-purpose digital I/O/USART0 clock: external input − UART or SPI mode, output – SPI mode
General-purpose digital I/O pin/transmit data out – USART0/UART mode
General-purpose digital I/O pin/receive data in – USART0/UART mode
General-purpose digital I/O pin/transmit data out – USART1/UART mode
General-purpose digital I/O pin/receive data in – USART1/UART mode
General-purpose digital I/O pin/Timer_B, capture: CCI0A or CCI0B input, compare: Out0 output
General-purpose digital I/O pin/Timer_B, capture: CCI1A or CCI1B input, compare: Out1 output
General-purpose digital I/O pin/Timer_B, capture: CCI2A or CCI2B input, compare: Out2 output
General-purpose digital I/O pin/Timer_B, capture: CCI3A or CCI3B input, compare: Out3 output
General-purpose digital I/O pin/Timer_B, capture: CCI4A or CCI4B input, compare: Out4 output
General-purpose digital I/O pin/Timer_B, capture: CCI5A or CCI5B input, compare: Out5 output
General-purpose digital I/O pin/Timer_B, capture: CCI6A or CCI6B input, compare: Out6 output
General-purpose digital I/O pin/Timer_B, clock signal TBCLK input
P4.1/TB1
P4.2/TB2
P4.3/TB3
P4.4/TB4
P4.5/TB5
P4.6/TB6
P4.7/TBCLK
P5.0/STE1
P5.1/SIMO1
P5.2/SOMI1
P5.3/UCLK1
P5.4/MCLK
P5.5/SMCLK
General-purpose digital I/O pin/slave transmit enable – USART1/SPI mode
General-purpose digital I/O pin/slave in/master out of USART1/SPI mode
General-purpose digital I/O pin/slave out/master in of USART1/SPI mode
General-purpose digital I/O pin/USART1 clock: external input − UART or SPI mode, output – SPI mode
General-purpose digital I/O pin/main system clock MCLK output
General-purpose digital I/O pin/submain system clock SMCLK output
9
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