ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢄꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃ ꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃꢆ ꢇ
ꢀ ꢉ ꢊ ꢋꢌ ꢁꢉ ꢍꢎ ꢏ ꢐ ꢀꢉ ꢑ ꢒꢓꢑ ꢓꢎ ꢔꢒ ꢓꢐ ꢐꢋ ꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
Terminal Functions (Continued)
MSP430x14x1 (continued)
TERMINAL
I/O
DESCRIPTION
NAME
P5.6/ACLK
NO.
50
I/O General-purpose digital I/O pin/auxiliary clock ACLK output
P5.7/TBOUTH
51
I/O General-purpose digital I/O pin/switch all PWM digital output ports to high impedance − Timer_B7: TB0 to
TB6
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
RST/NMI
TCK
59
60
61
2
I/O General-purpose digital I/O pin
I/O General-purpose digital I/O pin
I/O General-purpose digital I/O pin
I/O General-purpose digital I/O pin
I/O General-purpose digital I/O pin
I/O General-purpose digital I/O pin
I/O General-purpose digital I/O pin
I/O General-purpose digital I/O pin
3
4
5
6
58
57
I
I
Reset input, nonmaskable interrupt input port, or bootstrap loader start (in Flash devices).
Test clock. TCK is the clock input port for device programming test and bootstrap loader start (in Flash
devices).
TDI/TCLK
TDO/TDI
TMS
55
54
56
10
7
I
Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.
I/O Test data output port. TDO/TDI data output or programming data input terminal
I
I
Test mode select. TMS is used as an input port for device programming and test.
DV
Connect to DV
SS
Reserved
DV
SS
Reserved, do not connect externally
Connect to DV
11
8
I
I
SS
SS
XIN
Input port for crystal oscillator XT1. Standard or watch crystals can be connected.
Output terminal of crystal oscillator XT1
XOUT
9
O
I
XT2IN
XT2OUT
QFN Pad
53
52
NA
Input port for crystal oscillator XT2. Only standard crystals can be connected.
Output terminal of crystal oscillator XT2
O
NA QFN package pad connection to DV
SS
recommended.
10
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