ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢄ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢃ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄꢅ ꢆꢇꢃ ꢆꢇ
ꢀ ꢉꢊꢋ ꢌ ꢁꢉ ꢍ ꢎꢏꢐ ꢀ ꢉꢑꢒꢓ ꢑꢓ ꢎꢔ ꢒꢓ ꢐꢐ ꢋꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
functional block diagrams
MSP430x13x
P1
XIN XOUT
DV
RST/NMI
P2
P3
P4
P5
P6
DV
AV
AV
SS
CC
SS
CC
8
8
8
8
8
8
R
OSC
Oscillator
ACLK
16KB Flash 512B RAM
ADC12
12-Bit
8 Channels
<10µs Conv.
I/O Port 1/2 I/O Port 3/4 I/O Port 5/6
16 I/Os,
with
16 I/Os
16 I/Os
XT2IN
System
Clock
SMCLK
8KB Flash
256B RAM
Interrupt
Capability
XT2OUT
MCLK
MAB,
4 Bit
Test
MAB,M1A6BB,it16-Bit
JTAG
CPU
MCB
Incl. 16 Reg.
Bus
Conv
MDB, 16-Bit
MDB, 16 Bit
MDB, 8 Bit
4
TMS
TCK
Watchdog
Timer
Timer_B3
Timer_A3
3 CC Reg
POR
Comparator
A
USART0
3 CC Reg
Shadow
Reg
UART Mode
SPI Mode
TDI/TCLK
TDO/TDI
15/16-Bit
MSP430x14x
P1
XIN XOUT
DV
CC
RST/NMI
AV
SS
P2
P3
P4
P5
P6
DV
AV
SS
CC
8
8
8
8
8
8
R
OSC
Oscillator
ACLK
60KB Flash
48KB Flash
32KB Flash
2KB RAM
2KB RAM
1KB RAM
ADC12
I/O Port 1/2 I/O Port 3/4 I/O Port 5/6
16 I/Os,
with
16 I/Os
16 I/Os
XT2IN
System
Clock
SMCLK
12-Bit
8 Channels
<10µs Conv.
Interrupt
Capability
XT2OUT
MCLK
MAB,
4 Bit
Test
MAB,M1A6BB,it16-Bit
JTAG
CPU
MCB
Incl. 16 Reg.
Bus
Conv
MDB, 16-Bit
MDB, 16 Bit
MDB, 8 Bit
4
TMS
TCK
Hardware
Multiplier
Watchdog
Timer
Timer_B7
Timer_A3
3 CC Reg
POR
Comparator
A
USART0
USART1
7 CC Reg
Shadow
Reg
UART Mode UART Mode
SPI Mode SPI Mode
MPY, MPYS
MAC,MACS
TDI/TCLK
TDO/TDI
15/16-Bit
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265