MSP430F530x, MSP430F5310
SLAS677B –SEPTEMBER 2010–REVISED MARCH 2011
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Port J, J.0 JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
Pad Logic
PJREN.0
0
1
DVSS
DVCC
1
PJDIR.0
DVCC
0
1
PJOUT.0
0
1
From JTAG
PJ.0/TDO
PJDS.0
0: Low drive
1: High drive
From JTAG
PJIN.0
EN
D
Port J, J.1 to J.3 JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
Pad Logic
PJREN.x
0
1
DVSS
DVCC
1
PJDIR.x
DVSS
0
1
PJOUT.x
0
1
From JTAG
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
PJDS.x
0: Low drive
1: High drive
From JTAG
PJIN.x
EN
D
To JTAG
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