MSP430F673x
MSP430F672x
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SLAS731A –DECEMBER 2011–REVISED APRIL 2012
Port P1, P1.2, Input/Output With Schmitt Trigger (MSP430F67xxIPZ and MSP430F67xxIPN)
Pad Logic
To ADC10_A
INCHx = y
P1REN.x
P1MAP.x = PMAP_ANALOG
DVSS
DVCC
0
1
1
P1DIR.x
0
1
Direction
0: Input
1: Output
from Port Mapping
P1OUT.x
0
1
from Port Mapping
P1.2/PM_UCA0RXD/PM_UCA0SOMI/A0
P1DS.x
0: Low drive
1: High drive
P1SEL.x
P1IN.x
Bus
Keeper
EN
D
to Port Mapping
P1IRQ.x
P1IE.x
EN
Set
Q
P1IFG.x
P1SEL.x
P1IES.x
Interrupt
Edge
Select
Table 64. Port P1 (P1.2) Pin Functions (MSP430F67xxIPZ and MSP430F67xxIPN)
CONTROL BITS/SIGNALS(1)
PIN NAME (P1.x)
x
FUNCTION
P1DIR.x
P1SEL.x
P1MAPx
P1.2/PM_UCA0RXD/
PM_UCA0SOMI/A0
2
P1.2 (I/O)
I: 0; O: 1
0
1
1
X
UCA0RXD/UCA0SOMI
A0(2)
X
X
default
= 31
(1) X = Don't care
(2) Setting P1SEL.x bit together with P1MAPx = PM_ANALOG disables the output driver as well as the input Schmitt trigger.
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