MSP430F673x
MSP430F672x
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SLAS731A –DECEMBER 2011–REVISED APRIL 2012
Low-Power Mode Supply Currents (Into VCC) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1)(2)
TEMPERATURE (TA)
PARAMETER
VCC
PMMCOREVx
-40°C
TYP
25°C
TYP
60°C
TYP
85°C
TYP
UNIT
MAX
MAX
87
99
9
MAX
MAX
96
2.2 V
3.0 V
2.2 V
3.0 V
0
3
0
3
0
1
2
0
1
2
3
0
1
2
3
0
1
2
3
75
85
78
89
81
93
84
98
ILPM0,1MHz
Low-power mode 0(3)(4)
Low-power mode 2(5)(4)
µA
µA
110
17
5.9
6.9
1.4
1.5
1.7
2.2
2.3
2.5
2.5
1.4
1.5
1.6
1.6
1.3
1.4
1.4
1.4
0.65
1.16
0.70
6.2
7.4
1.7
1.9
2.0
2.5
2.7
2.9
2.9
1.7
1.8
1.9
1.9
1.6
1.6
1.7
1.7
0.80
1.24
0.78
6.9
8.4
2.5
2.7
2.9
3.3
3.5
3.7
3.7
2.4
2.5
2.7
2.7
2.3
2.4
2.5
2.5
0.90
1.43
0.90
9.4
11
ILPM2
10
19
4.9
5.2
5.5
5.5
5.8
6.1
6.1
4.5
4.7
4.9
5.0
4.4
4.5
4.8
4.8
1.30
1.87
1.20
Low-power mode 3, crystal
mode(6)(4)
ILPM3,XT1LF
2.2 V
µA
µA
3.1
12.7
Low-power mode 3, crystal
mode(6)(4)
ILPM3,XT1LF
3.0 V
3.5
2.2
14.0
11.5
Low-power mode 3,
VLO mode(7)(4)
ILPM3,VLO
3.0 V
3.0 V
µA
µA
2.4
2.0
12.7
11.1
ILPM4
Low-power mode 4(8)(4)
2.2
12.2
2.2V
3.0V
3.0V
Low-power mode 3.5, RTC
active on AUXVCC3(9)
ILPM3.5
ILPM4.5
µA
µA
2.05
1.05
2.71
1.85
Low-power mode 4.5(10)
(1) All inputs are tied to 0 V or to VCC. Outputs do not source or sink any current.
(2) The currents are characterized with a Micro Crystal MS1V-T1K crystal with a load capacitance of 12.5 pF. The internal and external load
capacitance are chosen to closely match the required 12.5 pF.
(3) Current for watchdog timer clocked by SMCLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 0, OSCOFF = 0 (LPM0); fACLK = 32768 Hz, fMCLK = 0 MHz, fSMCLK = fDCO = 1 MHz
(4) Current for brownout, high side supervisor (SVSH) normal mode included. Low side supervisor and monitors disabled (SVSL, SVML).
High side monitor disabled (SVMH). RAM retention enabled.
(5) Current for watchdog timer clocked by ACLK and RTC clocked by XT1 included. ACLK = low frequency crystal operation (XTS = 0,
XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 1, OSCOFF = 0 (LPM2); fACLK = 32768 Hz, fMCLK = 0 MHz, fSMCLK = fDCO = 0 MHz; DCO setting
= 1 MHz operation, DCO bias generator enabled.
(6) Current for watchdog timer clocked by ACLK and RTC clocked by XT1 included. ACLK = low frequency crystal operation (XTS = 0,
XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); fACLK = 32768 Hz, fMCLK = fSMCLK = fDCO = 0 MHz
(7) Current for watchdog timer clocked by ACLK included. RTC is disabled (RTCHOLD=1). ACLK = VLO.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); fACLK = fVLO, fMCLK = fSMCLK = fDCO = 0 MHz
(8) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4); fDCO = fACLK = fMCLK = fSMCLK = 0 MHz
(9) fDCO = fMCLK = fSMCLK = 0 MHz, fACLK = 32768 Hz, PMMREGOFF = 1, RTC active on AUXVCC3 supply
(10) fDCO = fMCLK = fSMCLK = 0 MHz, fACLK = 0 Hz, PMMREGOFF = 1
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