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SLOS580B – MAY 2008 – REVISED JULY 2008
IEC SAFETY LIMITING VALUES
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.
A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate
sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system
failures.
PARAMETER
I
S
T
S
Safety input, output, or supply current
Maximum case temperature
DW-16
DW-16
TEST CONDITIONS
θ
JA
= 212°C/W, V
I
= 5.5 V,
T
J
= 170°C, T
A
= 25°C
MIN
TYP
MAX
210
150
UNIT
mA
°C
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum
ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the
application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the
Thermal Characteristics table is that of a device installed in the JESD51-3, Low Effective Thermal Conductivity
Test Board for Leaded Surface Mount Packages and is conservative. The power is the recommended maximum
input voltage times the current. The junction temperature is then the ambient temperature plus the power times
the junction-to-air thermal resistance.
THERMAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
θ
JA
θ
JB
θ
JC
P
D
(1)
Junction-to-Air
Junction-to-Board Thermal Resistance
Junction-to-Case Thermal Resistance
Device Power Dissipation
V
CC1
= V
CC2
= 5.25 V, T
J
= 150°C, C
L
= 15 pF,
Input a 20 MHz 50% duty cycle square wave
TEST CONDITIONS
Low-K Thermal Resistance
(1)
MIN
TYP MAX
168
96.1
61
48
220
UNIT
°C/W
°C/W
°C/W
mW
High-K Thermal Resistance
Tested in accordance with the Low-K or High-K thermal metric defintions of EIA/JESD51-3 for leaded surface mount packages.
300
275
250
Safety Limiting Current - mA
225
200
175
150
125
100
75
50
25
0
0
50
100
150
200
V
CC1,2
at 3.6 V
T
C
- Case Temperature - °C
Figure 14. DW-16
θ
JC
Thermal Derating Curve per IEC 60747-5-2
Copyright © 2008, Texas Instruments Incorporated
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