DRV8860
www.ti.com
SLRS065A –SEPTEMBER 2013–REVISED NOVEMBER 2013
PW (TSSOP) PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VM
DIN
CLK
LATCH
GND
DOUT
nFAULT
ENABLE
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
Pin Functions
NAME
POWER AND GROUND
PIN I/O(1)
DESCRIPTION
EXTERNAL COMPONENTS OR CONNECTIONS
GND
5
—
Device ground
Motor power supply
All pins must be connected to ground
Connect to motor supply voltage. Bypass to GND with a 0.1μF ceramic capacitor
plus a 10μF electrolytic capacitor.
VM
1
—
CONTROL AND SERIAL INTERFACE
Output stage enable
control input
Logic high to enable outputs, logic low to disable outputs. Internal logic and
registers can be read and written to when ENABLE is logic low. Internal pulldown.
ENABLE
LATCH
CLK
8
4
3
I
I
I
Serial latch signal
Refer to serial communication waveforms. Internal pulldown.
Rising edge clocks data into part for write operations. Falling edge clocks data out
of part for read operations. Internal pulldown.
Serial clock input
DIN
2
6
I
Serial data input
Serial data output
Serial data input from controller. Internal pulldown.
DOUT
STATUS
O
Serial data output to controller. Open-drain output with internal pullup.
Logic low when in fault condition. Open-drain output requires external pullup.
Faults: OCP, OL, OTS, UVLO
nFAULT
7
OD Fault
OUTPUT
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
16
15
14
13
12
11
10
9
O
O
O
O
O
O
O
O
Low-side output 1
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
Low-side output 2
Low-side output 3
Low-side output 4
Low-side output 5
Low-side output 6
Low-side output 7
Low-side output 8
(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
Critical Components
PIN
1
NAME
VM
COMPONENT
10µF electrolytic rated for VM voltage to GND,
0.1µF ceramic rated for VM voltage to GND
7
nFAULT
Requires external pullup to logic supply
Copyright © 2013, Texas Instruments Incorporated
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