INTERFACING MULTIPLE DAC811s
IN 8-BIT SYSTEMS
Many applications, such as automatic test systems, require
that the outputs of several D/A converters be updated simul-
taneously. The interface shown in Figure 12 uses a 74LS138
decoder to decode a set of eight adjacent addresses, to load
the input latches of four DAC811s. The example shows a
right-justified data format.
A ninth address using A
3
causes all DAC811s to be updated
simultaneously. If a particular DAC811 is always loaded
last—for instance, D/A #4—A
3
is not needed, thus saving
eight address spaces for other uses. Incorporate A
3
into the
base address decoder, remove the inverter, connect the
common LDAC line to N
C
of D/A #4, and connect D1 of the
74LS138 to +5V.
12- AND 16-BIT MICROCOMPUTER INTERFACE
For this application, the input latch enable lines, N
A
, N
B
and
N
C,
are tied low, causing the latches to be transparent. The
D/A latch, and therefore DAC811, is selected by the address
decoder and strobed by WR.
WR
A
15
A
4
Base
Address
Decoder
CS
WR
LDAC
N
C
N
B
N
A
DAC811
(1)
ADDRESS BUS
A3
A2
A1
A0
0
WR
74LS138
0
DAC811
(2)
0
0
0
0
0
WR
LDAC
9
7
N
C
N
B
N
A
DAC811
(4)
0
1
LDAC
N
C
N
B
N
A
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
X
OPERATION
Load 8 LSB – D/A #1
Load 4 MSB – D/A #1
Load 8 MSB – D/A #2
Load 4 MSB – D/A #2
Load 8 MSB – D/A #3
Load 4 MSB – D/A #3
Load 8 MSB – D/A #4
Load 4 MSB – D/A #4
Load D/A Latch—All D/A
A
3
Microcomputer
4
5
G
2A
G
2B
G
1
Y0
Y1
Y2
15
14
13
12
6
Y3 11
Y4 10
A
2
A
1
A
0
3
2
1
Y5
C
B
A
Y6
Y7
FIGURE 12. Interfacing Multiple DAC811s to an 8-Bit Bus.
®
9
DAC811
TI [ TEXAS INSTRUMENTS ]
