CC2640R2L
ZHCSRK4A –APRIL 2020 –REVISED SEPTEMBER 2020
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7.2 Signal Descriptions –RGZ Package
表7-1. Signal Descriptions –RGZ Package
NAME
NO.
33
23
5
TYPE
DESCRIPTION
DCDC_SW
DCOUPL
DIO_0
Power
Output from internal DC/DC(1)
Power
1.27-V regulated digital-supply decoupling capacitor(2)
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
GPIO
DIO_1
6
GPIO
DIO_2
7
GPIO
DIO_3
8
GPIO
DIO_4
9
GPIO
DIO_5
10
11
12
14
15
16
17
18
19
20
21
26
27
28
29
30
31
32
36
37
38
39
40
41
42
43
24
25
35
GPIO, high-drive capability
DIO_6
GPIO, high-drive capability
DIO_7
GPIO, high-drive capability
DIO_8
GPIO
DIO_9
GPIO
DIO_10
DIO_11
DIO_12
DIO_13
DIO_14
DIO_15
DIO_16
DIO_17
DIO_18
DIO_19
DIO_20
DIO_21
DIO_22
DIO_23
DIO_24
DIO_25
DIO_26
DIO_27
DIO_28
DIO_29
DIO_30
JTAG_TMSC
JTAG_TCKC
RESET_N
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO, JTAG_TDO, high-drive capability
GPIO, JTAG_TDI, high-drive capability
GPIO
GPIO
GPIO
GPIO
GPIO
Digital/Analog I/O GPIO, Analog
Digital/Analog I/O GPIO, Analog
Digital/Analog I/O GPIO, Analog
Digital/Analog I/O GPIO, Analog
Digital/Analog I/O GPIO, Analog
Digital/Analog I/O GPIO, Analog
Digital/Analog I/O GPIO, Analog
Digital/Analog I/O GPIO, Analog
Digital I/O
Digital I/O
Digital input
JTAG TMSC, high-drive capability
JTAG TCKC(3)
Reset, active-low. No internal pullup.
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RF_P
RF_N
1
2
RF I/O
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
VDDR
45
48
Power
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (4)
1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (5)
VDDR_RF
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