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CC2510F16 参数 Datasheet PDF下载

CC2510F16图片预览
型号: CC2510F16
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller]
分类和应用: 存储射频控制器
文件页数/大小: 244 页 / 2582 K
品牌: TI [ TEXAS INSTRUMENTS ]
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CC2510Fx / CC2511Fx  
I2SCLKF2 I2SCLKF1 I2SCLKF0  
Fs (kHz)  
Word Size (W)  
CLKDIV  
101.5625  
50.78125  
9.21201  
8.46354  
Exact  
Yes  
Yes  
No  
8
8
0x06  
0x06  
0x8A  
0x06  
0x59  
0x59  
0x2F  
0x59  
0x10  
0x20  
0x1B  
0xC0  
8
16  
16  
16  
44.1  
48  
Yes  
Table 58: Example I2S Clock Configurations (CC2510Fx, 26 MHz)  
12.15.8.2 Word Size  
To send mono samples, I2SCFG0.TXMONO  
should be set to 1. Each word will then be  
repeated in both channels before a new word  
is fetched from the data registers. This is to  
enable sending a mono audio signal to a  
stereo audio sink device.  
The word size must be set before master  
mode is enabled. The word size is the number  
of bits used for each sample and can be set to  
a value between 1 and 33. To set the word  
size, write word size  
1
to the  
I2SCFG1.WORDS[4:0] bits. Setting the word  
size to a value of 17 or more causes the I2S to  
pad each word with 0’s in the least significant  
bits since the data registers provide maximum  
16 bits. This feature allows samples to be sent  
to an I2S device that takes a higher resolution  
than 16 bits.  
12.15.11 Word Counter  
The I2S contains a 10-bit word counter, which  
is counting transitions on the WS line. The  
counter can be cleared by triggers or by writing  
to the I2SWCNT register. When a trigger  
occurs, or a value is written to I2SWCNT, the  
current value of the word counter is copied into  
the  
If the size of the received samples exceeds 16  
bits, only the 16 most significant bits will be put  
in the data registers and the remaining low  
order bits will be discarded.  
I2SSTAT.WCNT[9:8]:I2SWCNT.WCNT[7:0]regi  
sters and the word counter is cleared.  
Three triggers can be used to copy/clear the  
word counter.  
12.15.9 Slave Mode  
The I2S is configured as a slave device by  
setting I2SCFG0.MASTERto 0. When in slave  
mode the SCK and WS signals are generated  
by an external I2S master and are inputs to the  
I2S interface.  
USB SOF: USB Start of Frame. Occurs  
every ms (CC2511Fx only)  
T1_CH0: Timer 1, compare, channel 0  
IOC_1: IO pin input transition (P1_3)  
Which trigger to use is configured through the  
TRIGNUMfield in the I2SCFG1register. When  
the I2S is configured not to use any trigger  
(I2SCFG1.TRIGNUM=0), the word counter can  
only be copied/cleared from software.  
12.15.9.1 Word Size  
When the I2S operates in slave mode, the word  
size is determined by the master that  
generates the WS signal.  
The I2S will provide bits from the internal 16-bit  
buffer until the buffer is empty. If the buffer  
becomes empty and the master still requests  
more bits, the I2S will send 0’s (low order bits).  
The word counter will saturate if it reaches its  
maximum value. Software should configure the  
trigger-interval and sample-rate to ensure this  
never happens.  
If more than 16 bits are being received, the low  
order bits are discarded.  
CC2511Fx: The word counter is typically used to  
calculate the average sample rate over a long  
period of time (e.g. 1 second) needed by  
adaptive isochronous USB endpoints. The  
USB SOF event must then be used as trigger.  
12.15.10 Mono  
The I2S also supports mono audio samples.  
12.15.12 µ-Law Compression and Expansion  
To receive mono samples, I2SCFG0.RXMONO  
should be set to 1. Words from the right  
channel will then not be read into the data  
registers. This feature is included because  
some mono devices repeat their audio data in  
both channels and the left channel is the  
default mono channel.  
The I2S interface can be configured to perform  
µ-Law compression and expansion. µ-Law  
compression is enabled by setting the  
I2SCFG0.ULAWC bit to  
1
and µ-Law  
SWRS055F  
Page 162 of 241  
 
 
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