bq4011/bq4011Y
AC Test Conditions
Parameter
Test Conditions
0V to 3.0V
Input pulse levels
Input rise and fall times
5 ns
Input and output timing reference levels
Output load (including scope and jig)
1.5 V (unless otherwise specified)
See Figures 1 and 2
Figure 1. Output Load A
Figure 2. Output Load B
Read Cycle (T = T
, V
≤ V
≤ V
)
A
OPR CCmin
CC
CCmax
-70/-70N
-100
-150/-150N
-200
Min. Max. Min. Max. Min. Max.
Min. Max.
Symbol
Parameter
Unit
Conditions
tRC
Read cycle time
70
-
-
100
-
150
-
200
-
ns
tAA
Address access time
70
70
-
-
100
100
-
-
150
150
-
-
200
200
ns
ns
Output load A
Output load A
tACE
Chip enable access time
-
Output enable to
output valid
tOE
-
5
35
-
-
5
50
-
-
10
5
70
-
-
10
5
90
-
ns
ns
ns
ns
ns
ns
Output load A
Output load B
Output load B
Output load B
Output load B
Output load A
Chip enable to output
in low Z
tCLZ
tOLZ
tCHZ
tOHZ
tOH
Output enable to
output in low Z
5
-
5
-
-
-
Chip disable to output
in high Z
0
25
25
-
0
40
35
-
0
60
50
-
0
70
70
-
Output disable to
output in high Z
0
0
0
0
Output hold from
address change
10
10
10
10
Aug. 1993 C
4
TI [ TEXAS INSTRUMENTS ]
