bq3285
UTI - Update Transfer Inhibit
This bit is set to a 1 every tPI time, where tPI is the time
period selected by the settings of RS0–RS3 in register A.
Reading register C clears this bit.
7
6
-
5
-
4
-
3
-
2
-
1
-
0
-
UTI
INTF - Interrupt Request Flag
7
6
-
5
-
4
-
3
-
2
-
1
-
0
-
This bit inhibits the transfer of RTC bytes to the user
buffer:
INTF
1 = Inhibits transfer and clears UIE
0 = Allows transfer
This flag is set to a 1 when any of the following is true:
AIE = 1 and AF = 1
PIE = 1 and PF = 1
Register C
UIE = 1 and UF = 1
Register C Bits
Reading register C clears this bit.
7
6
5
4
3
0
2
0
1
0
0
0
INTF PF
AF
UF
Register D
7
6
-
5
-
4
-
3
-
2
-
1
-
0
-
Register C is the read-only event status register.
VRT
Bits 0–3 - Unused Bits
Register D is the read-only data integrity status regis-
ter.
7
-
6
-
5
-
4
-
3
0
2
0
1
0
0
0
Bits 0–6 - Unused Bits
These bits are always set to 0.
7
-
6
0
5
0
4
0
3
0
2
0
1
0
0
0
UF - Update Event Flag
7
-
6
-
5
-
4
3
-
2
-
1
-
0
-
These bits are always set to 0.
UF
VRT - Valid RAM and Time
This bit is set to a 1 at the end of the update cycle.
Reading register C clears this bit.
Register D Bits
AF - Alarm Event Flag
7
6
0
5
0
4
0
3
0
2
0
1
0
0
0
VRT
7
-
6
-
5
4
-
3
-
2
-
1
-
0
-
AF
1 = Valid backup energy source
0 = Backup energy source is depleted
This bit is set to a 1 when an alarm event occurs. Read-
ing register C clears this bit.
When the backup energy source is depleted (VRT = 0),
data integrity of the RTC and storage registers is not
guaranteed.
PF - Periodic Event Flag
7
-
6
5
-
4
-
3
-
2
-
1
-
0
-
PF
Jan. 1999 E
10
TI [ TEXAS INSTRUMENTS ]
