bq24070
bq24071
www.ti.com
SLUS694B–MARCH 2006–REVISED AUGUST 2006
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0°C ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IIL
Low-level input current, Mode
–1
µA
TIMERS
K(TMR)
Timer set factor
t(CHG) = K(TMR) × R(TMR)
0.313
30
0.360
0.414
100
s/Ω
kΩ
s
(9)
R(TMR)
External resistor limits
Precharge timer
t(PRECHG)
I(FAULT)
0.09 × t(CHG)
0.10 × t(CHG) 0.11 × t(CHG)
1
Timer fault recovery pullup from
OUT to BAT
kΩ
CHARGER SLEEP THRESHOLDS (PG THRESHOLDS, LOW → POWER GOOD)
VVCC
VI(BAT)
+125 mV
≤
V
(UVLO)≤ VI(BAT)≤ VO(BAT-REG)
,
,
(10)
V(SLPENT)
Sleep-mode entry threshold
Sleep-mode exit threshold
Deglitch time for sleep mode(11)
No t(BOOT-UP) delay
V
VVCC
VI(BAT)
+190 mV
≥
V(UVLO)≤ VI(BAT)≤ VO(BAT-REG)
(10)
V(SLPEXIT)
No t(BOOT-UP) delay
R(TMR) = 50 kΩ,
V(IN) decreasing below threshold, 100-ns
fall time, 10-mv overdrive
t(DEGL)
START-UP CONTROL BOOT-UP
t(BOOT-UP) Boot-up time
SWITCHING POWER SOURCE TIMING
22.5
150
ms
ms
On the first application of input with
Mode Low
120
180
50
When input applied. Measure from:
[PG: Lo → Hi to I(IN) > 5 mA],
I(OUT) = 100 mA,
Switching power source from
input to battery
tSW-BAT
µs
°C
RTRM = 50 K
THERMAL SHUTDOWN REGULATION(12)
T(SHTDWN)
Temperature trip
TJ (Q1 and Q3 only)
TJ (Q1 and Q3 only)
TJ (Q2)
155
30
Thermal hysteresis
TJ(REG)
UVLO
V(UVLO)
Temperature regulation limit
115
135
Undervoltage lockout
Hysteresis
Decreasing VCC
2.45
2.50
27
2.65
V
mV
(9) To disable the safety timer and charge termination, tie TMR to the VREF pin.
(10) The IC is considered in sleep mode when IN is absent (PG = OPEN DRAIN).
(11) Does not declare sleep mode until after the deglitch time and implement the needed power transfer immediately according to the
switching specification.
(12) Reaching thermal regulation reduces the charging current. Battery supplement current is not restricted by either thermal regulation or
shutdown. Input power FETs turn off during thermal shutdown. The battery FET is only protected by a short-circuit limit which typically
does not cause a thermal shutdown (input FETs turning off) by itself.
6
Submit Documentation Feedback
TI [ TEXAS INSTRUMENTS ]
