bq24070
bq24071
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SLUS694B–MARCH 2006–REVISED AUGUST 2006
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0°C ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Voltage on ISET1, VVCC≥ 4.35 V,
Battery charge current set
voltage(5)
V(SET)
VI(OUT)- VI(BAT) > V(DO-MAX)
,
2.47
2.50
2.53
V
VI(BAT) > V(LOWV)
100 mA ≤ IO(BAT) ≤ 1.5 A
375
300
425
450
450
600
K(SET)
Charge current set factor, BAT
10 mA ≤ IO(BAT) ≤ 100 mA(6)
USB MODE INPUT CURRENT LIMIT
I(USB) USB input port current range
ISET2 = Low
ISET2 = High
80
90
100
500
mA
V
400
BAT PIN CHARGING VOLTAGE REGULATION, VO (BAT-REG) + V (DO-MAX) < VCC, ITERM < IBAT(OUT) ≤ 1 A
Battery charge voltage
4.2
VO(BAT-REG)
TA = 25°C
–0.5%
–1%
0.5%
1%
Battery charge voltage regulation
accuracy
CHARGE TERMINATION DETECTION
Charge termination detection
range
VI(BAT) > V(RCH),
I(TERM)
10
150
mA
mV
I(TERM) = (K(SET) × V(TERM))/ RSET
VI(BAT) > V(RCH) , Mode = High
VI(BAT) > V(RCH) , Mode = Low
230
95
250
100
270
130
Charge termination set voltage,
measured on ISET1
V(TERM)
tFALL = 100 ns, 10 mV overdrive,
ICHG increasing above or decreasing
below threshold
Deglitch time for termination
detection
TDGL(TERM)
22.5
ms
TEMPERATURE SENSE COMPARATORS
VLTF
VHTF
High voltage threshold
Low voltage threshold
Temp fault at V(TS) > VLTF
Temp fault at V(TS) < VHTF
2.465
0.485
2.500
0.500
2.535
0.515
V
V
Temperature sense current
source
ITS
94
100
106
µA
ms
R(TMR) = 50 kΩ, VI(BAT) increasing or
decreasing above and below;
100-ns fall time, 10-mv overdrive
Deglitch time for temperature
fault detection(7)
TDGL(TF)
22.5
BATTERY RECHARGE THRESHOLD
VO(BAT-REG)
–0.075
VO(BAT-REG)
–0.100
VO(BAT-REG)
–0.125
VRCH
Recharge threshold voltage
V
R(TMR) = 50 kΩ, VI(BAT) increasing
or decreasing below threshold,
100-ns fall time, 10-mv overdrive
Deglitch time for recharge
detection(7)
TDGL(RCH)
22.5
ms
STAT1, STAT2, AND PG, OPEN DRAIN (OD) OUTPUTS(8)
Low-level output saturation
voltage
IOL = 5 mA, An external pullup
resistor ≥ 1 K required.
VOL
0.25
5
V
ILKG
Input leakage current
1
µA
ISET2, CE INPUTS
VIL
Low-level input voltage
0
1.4
–1
0.4
1
V
VIH
High-level input voltage
Low-level input current, CE
High-level input current, CE
Low-level input current, ISET2
High-level input current, ISET2
Holdoff time, CE
IIL
IIH
µA
ms
IIL
VISET2 = 0.4 V
VISET2 = VCC
–20
4
IIH
40
6
t(CE-HLDOFF)
MODE INPUT
CE going low only
Falling Hi→Low; 280 K ± 10% applied
when low.
VIL
VIH
Low-level input voltage
High-level input voltage
0.975
1
1.025
V
V
Input RMode sets external hysteresis
VIL + .01
VIL + .024
(5) For half-charge rate, V(SET) is 1.25 V ± 25 mV.
(6) Specification is for monitoring charge current via the ISET1 pin during voltage regulation mode, not for a reduced fast-charge level.
(7) All deglitch periods are a function of the timer setting and is modified in DPPM or thermal regulation modes by the percentages that the
program current is reduced.
(8) See Charger Sleep mode for PG (VCC = VIN) specifications.
5
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