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SPRS717F –OCTOBER 2011–REVISED APRIL 2013
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I/O CELL [13]
Table 2-7. Ball Characteristics (ZCE and ZCZ Packages) (continued)
BALL RESET
REL. STATE
[7]
BUFFER
STRENGTH
(mA) [11]
PULLUP
/DOWN TYPE
[12]
ZCE BALL
NUMBER [1] NUMBER [1]
ZCZ BALL
TYPE BALL RESET
RESET REL. ZCE POWER / HYS
MODE [8] ZCZ POWER [9] [10]
PIN NAME [2]
SIGNAL NAME [3]
MODE [4]
NA
[5]
STATE [6]
A1, A19, D10, A1, A18, F8, VSS
VSS
GND
E7, E8, E9,
G8, G9, G11,
E10, F6, F7, G12, H6, H7,
F8, F12, F13, H8, H9, H10,
G8, G12, H9, H12, J6, J7,
H10, H11, J5, J8, J9, J10,
J6, J9, J11,
J11, K7, K9,
J14, J15, K8, K10, K11,
K9, K11, K12, L10, L11, L12,
L5, L6, L9,
L13, M6, M7,
L11, L14, L15, M8, M9, M10,
M9, M10,
M11, N8,
M12, N7,
N10, N11, V1,
N12, P7, P8, V18
P12, P13,
P14, R10,
T10, W1, W19
D8
E8
VSSA_ADC
VSSA_ADC
VSSA_USB
VSS_OSC (29)
VSS_RTC (28)
NA
NA
NA
NA
0
GND
GND
A
P16
V11
NA
M14, N14
V11
VSSA_USB
VSS_OSC
VSS_RTC
A5
A
A16
A10
WARMRSTn
nRESETIN_OUT
I/OD
0
Z
0(PU)
0
VDDSHV6 /
VDDSHV6
Yes
Yes
4
4
PU/PD
PU/PD
LVCMOS
LVCMOS
(8)
(4)
(9)
C15
A15
XDMA_EVENT_INTR0
xdma_event_intr0
timer4
0
2
3
4
5
6
7
0
2
3
4
5
6
7
0
I
VDDSHV6 /
VDDSHV6
I/O
O
I/O
I
clkout1
spi1_cs1
pr1_pru1_pru_r31_16
EMU2
I/O
I/O
I
gpio0_19
B15
D14
XDMA_EVENT_INTR1
xdma_event_intr1
tclkin
Z
L
7
VDDSHV6 /
VDDSHV6
Yes
4
PU/PD
LVCMOS
I
clkout2
O
I/O
I
timer7
pr1_pru0_pru_r31_16
EMU3
I/O
I/O
I
gpio0_20
W11
W12
V10
U11
XTALIN
OSC0_IN
Z
Z
0
0
VDDS_OSC /
VDDS_OSC
Yes
NA
NA
PD (2)
NA
LVCMOS
LVCMOS
(23)
(23)
XTALOUT
OSC0_OUT
0
O
VDDS_OSC /
VDDS_OSC
NA (14)
48
Terminal Description
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