ADS7810
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SBAS014A –MARCH 1992–REVISED SEPTEMBER 2010
TIMING INFORMATION
t1
R/C
t12
t2
t3
t5
t4
BUSY
MODE
t6
Convert
t7
Acquire
t8
Convert
Acquire
Hi-Z State
Data Valid
t10
Hi-Z State
DATA BUS
Data Valid
t9
Figure 1. Conversion Timing with Outputs Enabled After Conversion (CS Tied Low)
t11
t11
t11
t11
R/C
CS
t1
t3
t5
t4
BUSY
t6
Convert
t7
Acquire
Acquire
MODE
t2
DATA
BUS
Hi-Z State
Data Valid
t9
Hi-Z State
t13
Figure 2. Using CS to Control Conversion and Read Timing
TIMING REQUIREMENTS (TMIN to TMAX
)
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t1
t2
Convert pulse width
Data valid delay after R/C low
BUSY delay from R/C low
BUSY low
40
955
70
1095
125
t3
t4
950
90
1080
t5
BUSY delay after end of conversion
Aperture delay
t6
20
t7
Conversion time
910
200
1110
50
1020
230
1250
83
t8
Acquisition time
t7, t8
t9
Throughput time
Bus relinquish time
10
20
t10
t11
t12
t13
BUSY delay after data valid
R/C to CS setup time
Time between conversions
Bus access time
65
120
10
1250
10
25
62
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