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ADS1292 参数 Datasheet PDF下载

ADS1292图片预览
型号: ADS1292
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗,双通道, 24位模拟前端的生物电位测量 [Low-Power, 2-Channel, 24-Bit Analog Front-End for Biopotential Measurements]
分类和应用:
文件页数/大小: 69 页 / 1524 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADS1291  
ADS1292  
ADS1292R  
www.ti.com  
SBAS502A DECEMBER 2011REVISED MARCH 2012  
THEORY OF OPERATION  
This section contains details of the ADS1291, ADS1292, and ADS1292R internal functional elements. The  
analog blocks are discussed first followed by the digital interface. Blocks implementing ECG-specific functions  
are covered in the end.  
Throughout this document, fCLK denotes the signal frequency at the CLK pin, tCLK denotes the signal period of the  
CLK pin, fDR denotes the output data rate, tDR denotes the output data time period, and fMOD denotes the  
frequency at which the modulator samples the input.  
EMI FILTER  
An RC filter at the input acts as an electromagnetic interference (EMI) filter on channels 1 and 2. The –3-dB filter  
bandwidth is approximately 3 MHz.  
INPUT MULTIPLEXER  
The ADS1291, ADS1292, and ADS1292R input multiplexers are very flexible and provide many configurable  
signal-switching options. Figure 19 shows the multiplexer for the ADS1291, ADS1292, and ADS1292R. Note that  
TESTP, TESTM, and RLDIN/RLDREF are common to both channels. INP and INN are separate for each of the  
three pins. This flexibility allows for significant device and sub-system diagnostics, calibration, and configuration.  
Switch settings for each channel are selected by writing the appropriate values to the CH1SET or CH2SET  
register (see the CH1SET and CH2SET Registers in the Register Map section for details). More details of the  
ECG-specific features of the multiplexer are discussed in the Input Multiplexer subsection of the ECG-Specifc  
Functions.  
Device Noise Measurements  
Setting CHnSET[3:0] = 0001 sets the common-mode voltage of (VREFP + VREFN)/2 to both inputs of the  
channel. This setting can be used to test the inherent noise of the device in the user system.  
Test Signals (TestP and TestN)  
Setting CHnSET[3:0] = 0101 provides internally-generated test signals for use in sub-system verification at  
power-up. This functionality allows the entire signal chain to be tested out. Although the test signals are similar to  
the CAL signals described in the IEC60601-2-51 specification, this feature is not intended for use in compliance  
testing.  
Test signals are controlled through register settings (see the CONFIG2: Configuration Register 2 subsection in  
the Register Map section for details). INT_TEST enables the test signal and TEST_FREQ controls switching at  
the required frequency.  
Copyright © 2011–2012, Texas Instruments Incorporated  
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Product Folder Link(s): ADS1291 ADS1292 ADS1292R  
 
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