欢迎访问ic37.com |
会员登录 免费注册
发布采购

ADS1241-EVM 参数 Datasheet PDF下载

ADS1241-EVM图片预览
型号: ADS1241-EVM
PDF下载: 下载PDF文件 查看货源
内容描述: 24位模拟数字转换器 [24-Bit ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 25 页 / 408 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号ADS1241-EVM的Datasheet PDF文件第1页浏览型号ADS1241-EVM的Datasheet PDF文件第2页浏览型号ADS1241-EVM的Datasheet PDF文件第4页浏览型号ADS1241-EVM的Datasheet PDF文件第5页浏览型号ADS1241-EVM的Datasheet PDF文件第6页浏览型号ADS1241-EVM的Datasheet PDF文件第7页浏览型号ADS1241-EVM的Datasheet PDF文件第8页浏览型号ADS1241-EVM的Datasheet PDF文件第9页  
ELECTRICAL CHARACTERISTICS: VDD = 5V  
All specifications TMIN to TMAX, VDD = +5V, fMOD = 19.2kHz, PGA = 1, Buffer ON, fDATA = 15Hz, VREF (REF IN+) (REF IN) = +2.5V, unless otherwise specified.  
ADS1242  
ADS1243  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
ANALOG INPUT (AIN0 – AIN7)  
Analog Input Range  
Buffer OFF  
Buffer ON  
GND 0.1  
GND + 0.05  
VDD + 0.1  
VDD 1.5  
V
V
Full-Scale Input Range  
(In+) (In), See Block Diagram, RANGE = 0  
RANGE = 1  
±VREF /PGA  
±VREF /(2 PGA)  
V
V
Differential Input Impedance  
Buffer OFF  
Buffer ON  
5/PGA  
5
MΩ  
GΩ  
Bandwidth  
fDATA = 3.75Hz  
fDATA = 7.50Hz  
fDATA = 15.00Hz  
3dB  
3dB  
3dB  
1.65  
3.44  
14.6  
Hz  
Hz  
Hz  
Programmable Gain Amplifier  
Input Capacitance  
Input Leakage Current  
Burnout Current Sources  
User-Selectable Gain Ranges  
1
128  
9
5
2
pF  
pA  
µA  
Modulator OFF, T = 25°C  
OFFSET DAC  
Offset DAC Range  
RANGE = 0  
RANGE = 1  
±VREF /(2 PGA)  
±VREF /(4 PGA)  
V
V
Offset DAC Monotonicity  
Offset DAC Gain Error  
8
Bits  
%
±10  
Offset DAC Gain Error Drift  
1
ppm/°C  
SYSTEM PERFORMANCE  
Resolution  
Integral Nonlinearity  
Offset Error(1)  
Offset Drift(1)  
Gain Error(1)  
Gain Error Drift(1)  
Common-Mode Rejection  
No Missing Codes  
End Point Fit  
24  
Bits  
% of FS  
ppm of FS  
ppm of FS/°C  
%
ppm/°C  
dB  
±0.0015  
7.5  
0.02  
0.005  
0.5  
at DC  
100  
f
CM = 60Hz, fDATA = 15Hz  
130  
120  
100  
100  
dB  
dB  
dB  
dB  
fCM = 50Hz, fDATA = 15Hz  
Normal-Mode Rejection  
f
f
SIG = 50Hz, fDATA = 15Hz  
SIG = 60Hz, fDATA = 15Hz  
Output Noise  
Power-Supply Rejection  
See Typical Characteristics  
95  
(2)  
at DC, dB = 20 log(VOUT /VDD  
)
80  
dB  
VOLTAGE REFERENCE INPUT  
Reference Input Range  
VREF  
REF IN+, REF IN–  
VREF (REF IN+) (REF IN), RANGE = 0  
RANGE = 1  
0
0.1  
0.1  
VDD  
2.6  
VDD  
V
V
V
2.5  
Common-Mode Rejection  
Common-Mode Rejection  
Bias Current(3)  
at DC  
120  
120  
1.3  
dB  
dB  
µA  
fVREFCM = 60Hz, fDATA = 15Hz  
VREF = 2.5V  
POWER-SUPPLY REQUIREMENTS  
Power-Supply Voltage  
Current  
VDD  
4.75  
5.25  
375  
800  
425  
1400  
V
µA  
µA  
µA  
µA  
µA  
µA  
nA  
mW  
PGA = 1, Buffer OFF  
PGA = 128, Buffer OFF  
PGA = 1, Buffer ON  
PGA = 128, Buffer ON  
SLEEP Mode  
Read Data Continuous Mode  
PDWN  
PGA = 1, Buffer OFF  
240  
450  
290  
960  
60  
230  
0.5  
1.2  
Power Dissipation  
1.9  
TEMPERATURE RANGE  
Operating  
Storage  
40  
60  
+85  
+100  
°C  
°C  
NOTES: (1) Calibration can minimize these errors. (2) VOUT is a change in digital result. (3) 12pF switched capacitor at fSAMP clock frequency.  
ADS1242, 1243  
3
SBAS235B  
www.ti.com  
 复制成功!