SPECIFICATIONS
At T
A
= +25°C, AV
DD
= DV
DD
= +5V, MCLK = 320kHz, REF
EN
LOW, BIAS
EN
LOW, and external +2.5V reference, unless otherwise specified.
ADS1201U
PARAMETER
ANALOG INPUT
Absolute Input Voltage Range
With V
BIAS(1)
Differential Input Voltage Range
With V
BIAS(1)
Input Impedance
Input Capacitance
Input Leakage Current
At T
MIN
to T
MAX
SYSTEM PERFORMANCE
Dynamic Range
10Hz
60Hz
1kHz
60Hz
1kHz
Bandwidth
(5)
Bandwidth
(5)
Bandwidth
(5)
Bandwidth
(5)
Bandwidth
(5)
130
(6)
120
(6)
115
(6)
±0.0015
±0.0015
See Note 7
1
See Note 7
1
100
80
2.5
25
50
2
2.0
Using Internal Reference
3.15
3.3
50
3.0
2.5
3.45
10
TTL Compatible CMOS
I
IH
= +5µA
I
IL
= +5µA
= 2 TTL Loads
= 2 TTL Loads
2.0
–0.3
2.4
0.02
Specified Performance
4.75
4.6
0.4
No Load
No Load
REF
OUT
, V
BIAS
Disabled
–40
1.6
1
25
DV
DD
+0.3
0.8
0.4
1
5.25
V
V
V
V
MHz
V
mA
mA
mA
mA
mW
°C
2.6
CONDITIONS
MIN
TYP
MAX
UNITS
0
–10
–5
–20
See Note 2
250
(4)
8
5
+5
+10
+5
+20
50
1
V
V
V
V
kΩ
pF
pA
nA
dB
dB
dB
%FSR
%FSR
µV
µV/°C
ppm
µV/°C
dB
dB
V
ppm/°C
µVp-p
mA
Ω
V
µA
V
ppm/°C
mA
115
(6)
Integral Linearity Error
Offset Error
(2)
Offset Drift
(3)
Gain Error
(2)
Gain Error Drift
(3)
Common-Mode Rejection
Power Supply Rejection
REFERENCE
Internal Reference (REF
OUT
)
Drift
Noise
Load Current
Output Impedance
External Reference (REF
IN
)
Load Current
V
BIAS
Output
Drift
Load Current
DIGITAL INPUT/OUTPUT
Logic Family
Logic Levels:
V
IH
(MCLK)
V
IL
(MCLK)
V
OH
(MOUT)
V
OL
(MOUT)
MCLK Frequency
POWER SUPPLY REQUIREMENTS
Power Supply Voltage
Supply Current
Analog Current
Digital Current
Additional Analog Current
REF
OUT
Enabled
V
BIAS
Enabled
Total Power Dissipation
TEMPERATURE RANGE
Specified Performance
At DC
80
2.4
Source or Sink
–1
1
I
OH
I
OL
40
+85
NOTES: (1) This range is set with external resistors and V
BIAS
(as described in the text). Other ranges are possible. (2) After the on-chip offset and gain
calibration functions have been employed. (3) Re-calibration can reduce these errors. (4) Input impedance changes with MCLK. (5) Assume brick wall digital
filter is used. (6) 20 Log (full scale/r ms noise). (7) After calibration, these errors will be of the order of the effective resolution.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
ADS1201
2