SN54173, SN54LS173A, SN74173, SN74LS173A
4-BIT D-TYPE REGISTERS
WITH 3-STATE OUTPUTS
SDLS067A – OCTOBER 1976 – REVISED JUNE 1999
FUNCTION TABLE
INPUTS
OUTPUT
Q
DATA ENABLE
DATA
D
CLR
CLK
G1
X
G2
X
H
L
L
L
X
L
↑
X
X
X
X
L
X
X
Q
Q
Q
0
0
0
H
X
↑
X
H
L
L
L
L
↑
↑
L
L
L
L
H
H
When either M or N (or both) is (are) high, the output is
disabled to the high-impedance state; however, sequential
operation of the flip-flops is not affected.
†
logic symbol
’173
’LS173A
15
15
CLR
1
R
CLR
M
R
1
&
&
M
2
2
EN
C1
EN
C1
N
N
9
9
&
&
G1
10
G2
7
G1
G2
10
7
CLK
CLK
14
1D
3
4
5
6
14
13
12
11
3
4
5
6
1D
1Q
2Q
3Q
4Q
1D
2D
3D
4D
1D
1Q
2Q
3Q
4Q
13
2D
12
3D
11
4D
†
This symbol is in accordance with ANSI/IEEE Standard 91-1984 and IEC Publication 617-12.
Pin numbers shown are for D, J, N, and W packages.
2
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