THCV231-Q_THCV236-Q_Rev.2.60_E
Table 25. Remote side 2-wire serial slave register Read Procedure for 16bit register address
Step
Description
R/W
Address
0x04-0x0B
0x02 bit7
0x20
Set slave address of remote side 2-wire serial slave device (Low-order 7bits),
and enable this address (High-order 1bit).
1
2
3
4
5
W
Write 1 or 0 and clear(auto clear) access status register (2WIRE_ACS_END_INT).
Set slave address of access target 2-wire serial slave (choose the value set in 0x04-
0x0B)(Low-order 7bits), and set 1 to 0x20 bit7.
W
W
Set the byte number read from remote side 2-wire serial slave(Max 16byte).
Set the low-order bits([7:0]) of start address of remote side 2-wire serial slave register
to read.
W
0x22
W
0x29
Set the high-order bits([15:8]) of start address of remote side 2-wire serial slave register
to read.
6
7
W
W
0x2A
Write 1 to RD_START_16B. (Start read access to remote side 2-wire serial slave
register)
0x2C (*1)
2-wire serial slave of Sub-Link Master perform clock stretching until Sub-Link Slave
register access is completed. When read access is completed, SCL is released and
read data is stored in Sub-Link Master register (Address 0x10-0x1F).
When read access is completed, read data is stored in Sub-Link Master register
(Address 0x10-0x1F) and 2WIRE_ACS_END_INT register value become 1 and
interrupt occurs (INT=H → L).
8
-
-
-
-
(*2)
8
(*3)
9
If read access was normally ended, read value should be “0x1”.
HOST MPU read data stored in Sub-Link Master register.
Repeat from step2 to step10 if needed.
R
R
-
0x02
10
11
0x10-0x1F
-
*1 It’s Prohibit that HOST MPU start access to Sub-Link Slave or remote 2-wire serial slave before the previous access to
Sub-Link Slave or remote side 2-wire serial slave is completed.
*2 When 2WIRE_MODE = 00 (Clock Stretching Mode)
*3 When 2WIRE_MODE = 01 (No Clock Stretching Mode)
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