THCV231-Q_THCV236-Q_Rev.2.60_E
Data Enable
V-by-One® HS mode operation (MAINMODE=0) are shown below. THCV231-Q HSYNC pin input is DE signal.
Table 11 and related note shows requirements for DE. Video HSYNC signal may meet DE input requirement.
HSYNC output of THCV236-Q under THCV231-Q V-by-One® HS mode operation is invalid.
THCV231-Q
THCV236-Q
DE=1, D31-D0
D11-D0
DE=0, Low fixed
Video Data
CONT
1
0
DE=1, VSYNC=Fixed
DE=0, VSYNC
VSYNC
VSYNC
DE (HSYNC pin input)
Figure 2. Conceptual Diagram of the Basic Operation of the Chipset in V-by-One® HS mode
THCV231-Q
Input
tDEINT
tDEH
tDEL
CLKIN
(RF=1)
DE
Low
High
High
Low
Low
High
(HSYNC pin inut)
Valid Data
Invalid
Invalid
Invalid
Valid Data
Valid Data
Invalid
VSYNC
Valid Data
Valid Data
Invalid
Invalid
Valid Data
D11-D0
(MAINMODE=0)
THCV236-Q
Output
tDEH
tDEL
CLKOUT
(RF=1)
DE
Low
High
High
Low
Low
High
(DE pin output)
Keep the last data
of DE=L period
Keep the last data
of DE=L period
Keep the last data
of DE=L period
Valid Data
Valid Data
Valid Data
VSYNC
Valid Data
Valid Data
Valid Data
D11-D0
Low fixed
Low fixed
Low fixed
(MAINMODE=0)
Figure 3. Data and Synchronizing Signals Transmission Timing Diagram in V-by-One® HS mode
Table 11. DE Requirement
Symbol
Parameter
Condition
Min
Typ
Max Unit
MAINMODE=0 and HFSEL=0
MAINMODE=0 and HFSEL=1
MAINMODE=1
2×tTCIP
4×tTCIP *Note
Don’t care
-
-
-
ns
ns
tDEH
DE=1 Duration
MAINMODE=0 and HFSEL=0
MAINMODE=0 and HFSEL=1
MAINMODE=1
2×tTCIP
4×tTCIP *Note
Don’t care
-
-
-
ns
ns
tDEL
DE=0 Duration
*Note: In V-by-One® HS Mode (MAINMODE=0) and High Frequency Mode (HFSEL=1), the period between rising edges of DE
(tDEINT), high time of DE (tDEH) should always satisfy following equations.
tDEH = tTCIP*(2m) and tDEINT = tTCIP*(2n), m,n=2,3,4,5,6……
Copyright©2017 THine Electronics, Inc.
THine Electronics, Inc.
14/58
Security E
THINE [ THINE ELECTRONICS, INC. ]
