78Q8430 Data Sheet
DS_8430_001
4.5.3 100Base-TX Receiver
Table 18: MII 100Base-TX Receiver Timing
Parameter
Conditions
Min
600
300
–
Nom
700
350
20
–
Max
800
400
–
Unit
mVppd
mVppd
kΩ
Signal Detect Assertion Threshold
Signal Detect De-assertion Threshold
Differential Input Resistance
Jitter Tolerance (pk-pk)
4
–
ns
Baseline Wander Tracking
Signal Detect Assertion Time
Signal Detect De-assertion Time
-75
–
–
+75
1000
4
%
Not tested
Not tested
–
µs
–
–
µs
4.5.4 10Base-T Transmitter
Table 19: MII 10Base-T Transmitter Timing
Parameter
Conditions
Min
Nom
Max
2.8
Unit
Peak Differential Output Signal All data patterns
(see note below)
2.2
–
V
Harmonic Content
(dB below fundamental)
Any harmonic
All ones data
Not tested
27
–
–
dB
Link Pulse Width
–
–
–
100
300
350
–
–
–
ns
ns
ns
Start-of-Idle Pulse Width
Last bit 0
Last bit 1
Note: The Manchester-encoded data pulses, the link pulse and the start-of-idle pulse are tested against
the templates and using the procedures found in Clause 14 of IEEE 802.3. Measured at the line side of
the transformer. Test Condition: Transformer P/N: TLA-6T103. Line Termination: 100 Ω±1%
4.5.5 10Base-T Transmitter (Informative)
Table 20: MII 10Base-T Transmitter (Informative)
Parameter
Conditions
Min
Nom
Max
–
Unit
dB
Output Return Loss
Output Impedance Balance
15
–
–
f
1 MHz < freq < 20 MHz
–
dB
29 − 17log
10
Peak Common-mode Output Voltage
Common-mode Rejection
–
–
–
–
50
mV
mV
15 VPK, 10.1 MHz sine
wave applied to transmitter
common-mode. All data
sequences.
100
Common-mode Rejection Jitter
15 VPK, 10.1 MHz sine
wave applied to transmitter
common-mode. All data
sequences.
–
–
1
ns
Note: The specifications in the preceding table are included for information only. They are mainly a
function of the external transformer and termination resistors used for measurements
20
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
