78Q2120C
10/100BASE-TX
Transceiver
MR4: Auto-Negotiation Advertisement Register
BIT
SYMBOL TYPE DEFAULT DESCRIPTION
4.15
NP
RSVD
RF
R
R
0
0
0
Next Page: Not supported. Reads logic zero.
4.14
4.13
Reserved
R/W
Remote Fault: Setting this bit to ‘1’ allows the device to indicate to
the link partner a Remote Fault Condition.
4.12:5
TAF
R/W
(0Fh)
Technology Ability Field: The default value of this field is dependent
upon the MR1.15:11 register bits. This field can be overwritten by
management to auto-negotiate to an alternate common technology.
Writing to this register has no effect until auto-negotiation is re-
initiated.
4.12
4.11
4.10
4.9
A7
A6
A5
A4
R
0
0
0
0
Reserved for future technology.
Reserved
R/W
R/W
R
Reserved.
100BASE-T4:
operation.
The 78Q2120C does not support 100BASE-T4
4.8
4.7
A3
A2
R/W
R/W
R/W
R/W
R
(1)
(1)
100BASE-TX Full Duplex: If the MR1.14 bit is ‘1’, this bit will be set
to ‘1’ upon reset and will be writeable. Otherwise, this bit cannot be
set to ‘1’ by the management.
100BASE-TX: If the MR1.13 bit is ‘1’, this bit will be set to ‘1’ upon
reset and will be writeable. Otherwise, this bit cannot be set to ‘1’ by
the management.
4.6
A1
(1)
10BASE-T Full Duplex: If the MR1.12 bit is ‘1’, this bit will be set to
‘1’ upon reset and will be writeable. Otherwise, this bit cannot be set
to ‘1’ by the management.
4.5
A0
(1)
10BASE-T: If the MR1.11 bit is ‘1’, this bit will be set to ‘1’ upon reset
and will be writeable. Otherwise, this bit cannot be set to ‘1’ by the
management.
4.4:0
S4:0
01h
Selector Field: Hard coded with the value of ‘00001’ for IEEE 802.3.
Page: 14 of 35
© 2009 Teridian Semiconductor Corporation
Rev 1.3
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
