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78P2352 参数 Datasheet PDF下载

78P2352图片预览
型号: 78P2352
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道OC - 3 / STM1 - E / E4 LIU [Dual Channel OC-3/ STM1-E/ E4 LIU]
分类和应用:
文件页数/大小: 42 页 / 754 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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78P2352  
Dual Channel  
OC-3/ STM1-E/ E4 LIU  
REGISTER DESCRIPTION (CONTINUED)  
ADDRESS 0-1: INTERRUPT CONTROL REGISTER  
This register selects the events that would cause the interrupt pins to be activated. User may set as many bits as  
required.  
DFLT  
BIT  
NAME  
TYPE  
DESCRIPTION  
VALUE  
Interrupt Pin Polarity Selection:  
0 : Interrupt output is active-low (default)  
1 : Interrupt output is active-high  
7
INPOL  
--  
R/W  
R/W  
0
6:2  
01000 Reserved for future use  
TXLOL Error Mask (active low):  
Gates the TXLOL register bit to the INTTXxB interrupt pin.  
1
0
MTLOL  
MFERR  
R/W  
R/W  
1
1
0: Mask  
1: Pass  
FIERR Error Mask (active low):  
Gates the respective FIERR register bit to the INTTXxB interrupt pin.  
0: Mask  
1: Pass  
ADDRESS 0-2: RESERVED  
DFLT  
BIT  
NAME TYPE  
-- R/W  
DESCRIPTION  
VALUE  
7:0  
XXXXXXX0 Reserved.  
Page: 11 of 42  
2006 Teridian Semiconductor Corporation  
Rev. 2.4  
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