78P2351R
Serial 155M
NRZ to CMI Converter
PIN DESCRIPTION
LEGEND
TYPE
DESCRIPTION
TYPE DESCRIPTION
A
CIT
CI
CID
CIS
COZ
Analog Pin
3-State CMOS Digital Input
CMOS Digital Input
CMOS Digital Input w/ Pull-down
CMOS Schmitt Trigger Input
CMOS Tristate Digital Output
PO
OD
PI
S
G
LVPECL-Compatible Differential Output
Open-drain Output
LVPECL-Compatible Differential Input
Supply
Ground
TRANSMITTER PINS
NAME
PIN
TYPE DESCRIPTION
Transmit Serial Data Input:
SIDP
SIDN
4
5
PI
Differential NRZ data input. See Transmitter Operation section for more info
on different timing modes.
Transmit Serial CMI Data Output:
A CMI encoded data signal conforming to the relevant ITU-T G.703 pulse
templates when properly terminated and transformer coupled to 75ohm
cable.
53
54
CMIP
CMIN
A
Notes: 1) Pins are tri-stated during transmit power-down. 2) Pins are
active, but undefined during reset.
RECEIVER PINS
NAME
PIN
TYPE DESCRIPTION
Receive Serial NRZ Data Output:
13
14
SODP
SODN
Recovered serial data decoded into NRZ format and output at LVPECL levels.
Notes: 1) Outputs are squelched during LOS and held low. 2) Pins are active,
PO
but undefined during reset.
Receive Serial CMI Input:
50
51
RXP
RXN
A
Receive inputs that should be differentially terminated and transformer
coupled to the coaxial cable.
REFERENCE AND STATUS PINS
NAME
PIN
TYPE DESCRIPTION
Reference Clock Input: (Required)
A reference clock input used for clock/data recovery and generation. Can be
a differential 155.52MHz differential LVPECL Input (Type PI) at CKREFP/N
or a single-ended 19.44MHz or 77.78MHz CMOS Input (Type CI) at
CKREFP (tie CKREFN to ground when unused).
45
44
PI/
CI
CKREFP
CKREFN
Loss of Signal (active-high):
Standards compatible loss of signal indicator.
33
36
OD
A
LOS
Power-On Reset (active low):
See Power-On Reset description on use of this pin. Do not pull-up to Vcc.
PORB
Page: 14 of 31
2006 Teridian Semiconductor Corporation
Rev. 2.1