78P2351R
Serial 155M
NRZ to CMI Converter
PIN DESCRIPTION (continued)
SERIAL-PORT PINS
NAME
PIN TYPE DESCRIPTION
[SPSL=1] Serial-Port Enable:
High during read and write operations. Low disables the serial port.
While SEN is low, SDO remains in high impedance state, and SDI and
SCK activities are ignored.
SEN
41
42
CIU
CIS
[SPSL=0] Reserved. Must be tied high
[SPSL=1] Serial Clock:
Controls the timing of SDI and SDO.
[SPSL=0] Receive Monitor Mode Enable:
SCK_MON
When high, adds 20dB of flat gain to the incoming signal before
equalization.
[SPSL=1] Serial Data Input:
Inputs mode and address information. Also inputs register data during
a Write operation. Both address and data are input least significant bit
first.
SDI
40
39
CI
[SPSL=0] Reserved. Must be tied low
[SPSL=1] Serial Data Output:
Outputs register information during a Read operation. Data is output
least significant bit first
SDO
COZ
[SPSL=0] Must be tied low
POWER AND GROUND PINS
It is recommended that all supply pins be connected to a single power supply plane and all ground pins be
connected to a single ground plane.
NAME
PIN
TYPE DESCRIPTION
2, 6, 11, 31, 38,
43, 48, 52
VCC
S
Power Supply (Vdd)
Ground
3, 7, 12, 30, 35,
GND
G
37, 46, 47, 49, 55
Page: 16 of 31
2006 Teridian Semiconductor Corporation
Rev. 2.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
