78P2343JAT
3-port E3/DS3/STS-1 LIU
with Jitter Attenuator
PIN DESCRIPTION
LEGEND
TYPE
A
DESCRIPTION
Analog Pin
TYPE DESCRIPTION
CIT
CO
COZ
S
CMOS 3-State Input
CMOS Digital Output
CMOS Tristate Digital Output
Supply
CI
CMOS Digital Input
CIU
CID
CIS
CMOS Digital Input w/ Pull-up
CMOS Digital Input w/ Pull-down
CMOS Schmitt Trigger Input
G
Ground
TRANSMITTER PINS
NAME
PIN
TYPE
DESCRIPTION
Transmit Positive Data/Transmit NRZ:
When ENDECB =’1’, a logic one on this pin generates a positive AMI
pulse on the coax. This pin should not be high at the same time that
corresponding TNEGx is high.
23, 31
39
CI
TPOSx
TNEGx
When ENDECB =’0’, data on this pin is encoded and converted into
positive and negative AMI pulses.
Transmit Negative Data:
When ENDECB =’1’, a logic one on this pin generates a negative AMI
pulse on the coax. This pin should not be high at the same time that
corresponding TPOSx is high.
24, 32
40
CI
CIS
A
When ENDECB =’0’, this pin is ignored.
Transmitter Clock Input:
This signal is used to latch the respective TPOSx and TNEGx signals
into the 78P2343JAT.
25, 33
41
TCLKx
98, 92
85
LOUTPx
LOUTNx
Line Out:
Differential AMI Outputs. Requires a 1:2CT center-tapped
transformer and a shunt termination resistor. See APPLICATION
INFORMATION section for more info.
99, 93
86
Page 13 of 37
2005 Teridian Semiconductor Corporation
Rev 2.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
