78P2341JAT
E3/DS3/STS-1 LIU
with Jitter Attenuator
LOOPBACK MODES
The
LPBK
pin is used to activate common loopback
modes as shown in the table below. The LLBK and
RLBK bits in the Mode Control Register can also
control these modes when the Register Control bit,
REGEN, is enabled.
LPBK
pin
L
Z
H
Loopback Mode
Local (Analog) Loopback
Same as LLBK = ‘1’
Remote (Digital) Loopback
Same as RLBK = ‘1’
Normal Operation
Same as LLBK, RLBK = ‘0’
TPOS
TNEG
TCLK
Jitter
Attenuator
RPOS
RNEG
RCLK
B3ZS /
HDB3
Decoder
A third loopback mode is also available when using
the serial control interface. Local (Digital) Loopback
mode is controlled by the Jitter Attenuator Control
Register and only passes through the Jitter
Attenuator, bypassing all Analog blocks in the IC.
Local (Digital) Loopback
Controls Flags
RLBK
LBO E3 DS3
TXEN
B3ZS /
HDB3
Encoder
Transmit
Monitor
TXNW
Pulse
Shaper
LOUTP
LOUTN
Attenuator
ENDEC
Data
Detector
Adaptive
Equalizer
AGC
LINP
LINN
TCLKP
RCLKP
Power
Distribution
Clock
Recovery
Signal
Detector
LLBK
MON
LOS
PDTX PDRX
CKREF
SCK
SDIO
Control
Registers
Master
Bias
Generator
CKREF
When in Local (Analog) Loopback, the transmit
output signals, LOUTP,N are internally routed to the
receiver inputs. Any incoming signals on LINP,N will
be ignored when in Local Loopback. For proper
operation in this mode, the transmitter needs to be
properly terminated with no hanging cables.
Tx JAT Off
Controls Flags
RLBK
B3ZS/HDB3 ENDEC WITH LINE CODE VIOLATION
DETECT
The 78P2341JAT includes a selectable B3ZS/HDB3
Encoder/Decoder (ENDEC). When the
ENDEC
pin
is low, the ENDEC is selected and the decoder
generates a composite NRZ logic data stream
following the B3ZS (for DS3/STS-1) or HDB3 (for E3)
substitution codes via the RPOS pin as shown
below.
ENDEC
1
0
RPOS
Positive AMI
NRZ data
RNEG
Negative AMI
Receive Line Code
Violation Indicator
Local (Analog) Loopback
LBO E3 DS3
TXEN
Transmit
Monitor
TXNW
Tx JAT On
TPOS
TNEG
TCLK
Jitter
Attenuator
RPOS
RNEG
B3ZS /
HDB3
Encoder
Pulse
Shaper
LOUTP
LOUTN
Attenuator
ENDEC
Rx JAT On
Rx JAT Off
RCLK
B3ZS /
HDB3
Decoder
Data
Detector
Adaptive
Equalizer
AGC
LINP
LINN
TCLKP
RCLKP
Power
Distribution
Clock
Recovery
Signal
Detector
LLBK
MON
LOS
PDTX PDRX
CKREF
SCK
SDIO
Control
Registers
Master
Bias
Generator
CKREF
When in Remote (Digital) Loopback, the received
signals and clock data, RPOS/RNEG/RCLK, are
internally routed to the transmitter input signals. Any
incoming data on TPOS, TNEG, or TCLK will be
ignored when in Remote Loopback.
Remote (Digital) Loopback
Controls Flags
RLBK
LBO E3 DS3
TXEN
TPOS
TNEG
TCLK
Jitter
Attenuator
RPOS
RNEG
RCLK
B3ZS /
HDB3
Decoder
B3ZS /
HDB3
Encoder
Transmit
Monitor
TXNW
The decoder also detects Receive Line Code
Violations (RLCV) and outputs a pulse via the
RNEG pin. Three different classes of line code
violations are detected.
•
Too many zeros: More than two (three)
consecutive zeros in B3ZS (HDB3) mode.
Not enough zeros between bipolar pulse (B) and
bipolar violation pulse (V): (B,V) for B3ZS.
(B,V) or (B,0,V) for HDB3.
Code violation: Even number of bipolar pulses (B)
detected between bipolar violation pulses (V).
Pulse
Shaper
LOUTP
LOUTN
Attenuator
•
ENDEC
Data
Detector
Adaptive
Equalizer
AGC
LINP
LINN
TCLKP
RCLKP
Power
Distribution
Clock
Recovery
Signal
Detector
LLBK
MON
LOS
•
CKREF
PDTX PDRX
SCK
SDIO
Control
Registers
Master
Bias
Generator
CKREF
-3-
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
