DS_6618_005
78M6618 Data Sheet
2.4.15 ADC Converter, V3P3A Referenced
Table 19 shows the performance specifications for the ADC converter, V3P3A referenced. For this data,
FIR_LEN=0, VREF_DIS=0 and LSB values do not include the 9-bit left shift at the CE input.
Table 19: ADC Converter Performance Specifications
Parameter
Condition
Min
Typ
Max
Unit
mV
peak
Recommended Input Range
(Vin-V3P3A)
-250
250
Voltage to Current Crosstalk
Vin = 200 mV peak,
65 Hz, on VA.
Vcrosstalk = largest
measurement on IA or IB
-101
101
µV/V
106 *Vcrosstalk
cos(∠Vin − ∠Vcrosstalk)
Vin
THD (First 10 harmonics) 1:
250 mV-pk
Vin=65 Hz,
64 kpts FFT, Blackman-
Harris window
-75
-90
dB
dB
20 mV-pk
CKCE = 5 MHz
Input Impedance
Vin = 65 Hz
Vin = 65 Hz
40
90
kΩ
Temperature coefficient of Input
Impedance
1.7
Ω/°C
LSB size
[M40MHZ,
M26MHZ] =
[00], [10], or [11]
[M40MHZ,
M26MHZ] =
[01]
FIR_LEN=0
FIR_LEN=1
3231
355
nV/
LSB
3
1.25
4.75
3
VLSB = VREF
⋅
⋅
L
L = FIR length
nV/
LSB
FIR_LEN=0
1319
Digital Full Scale [M40MHZ,
FIR_LEN=0
FIR_LEN=1
±97336
±884736
LSB
3
M26MHZ] =
[00], [10], or [11]
L
3
L = FIR length
[M40MHZ,
M26MHZ] =
[01]
FIR_LEN=0
±238328
LSB
ADC Gain Error versus
%Power Supply Variation
106 ∆NoutPK 357nV /VIN
100∆V3P3A/3.3
Vin=200 mV pk, 65 Hz
V3P3A=3.0 V, 3.6 V
50
10
ppm/%
Input Offset (Vin-V3P3A)
-10
mV
1 Guaranteed by design; not production tested.
Rev. 1.4
21
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
